Message ID | 1594070006-816-1-git-send-email-abel.vesa@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [RESEND,v2] arm64: dts: imx8m: Add NOC nodes | expand |
On Tue, Jul 07, 2020 at 12:13:26AM +0300, Abel Vesa wrote: > From: Leonard Crestez <leonard.crestez@nxp.com> > > Add nodes for the main interconnect of the imx8m series chips. > > These nodes are bound to by devfreq and interconnect drivers. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> > Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > --- > > Changes since v1: > - picked up the bindinds header which were part of the original patch > from Leonard > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24 ++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 24 ++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 24 ++++++++++++++++++++++++ > 3 files changed, 72 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > index 76f040e..970d132 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mm.h> > > #include "imx8mm-pinfunc.h" > > @@ -877,6 +878,29 @@ > > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc"; > + reg = <0x32700000 0x100000>; > + clocks = <&clk IMX8MM_CLK_NOC>; > + fsl,ddrc = <&ddrc>; > + #interconnect-cells = <1>; > + operating-points-v2 = <&noc_opp_table>; > + > + noc_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-150M { > + opp-hz = /bits/ 64 <150000000>; > + }; Please have a newline between nodes. Shawn > + opp-375M { > + opp-hz = /bits/ 64 <375000000>; > + }; > + opp-750M { > + opp-hz = /bits/ 64 <750000000>; > + }; > + }; > + }; > + > aips4: bus@32c00000 { > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > index 9385dd7..cd38aae 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mn.h> > > #include "imx8mn-pinfunc.h" > > @@ -764,6 +765,29 @@ > > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mn-noc", "fsl,imx8m-noc"; > + reg = <0x32700000 0x100000>; > + clocks = <&clk IMX8MN_CLK_NOC>; > + fsl,ddrc = <&ddrc>; > + #interconnect-cells = <1>; > + operating-points-v2 = <&noc_opp_table>; > + > + noc_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-100M { > + opp-hz = /bits/ 64 <100000000>; > + }; > + opp-600M { > + opp-hz = /bits/ 64 <600000000>; > + }; > + opp-800M { > + opp-hz = /bits/ 64 <800000000>; > + }; > + }; > + }; > + > aips4: bus@32c00000 { > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index f70435c..d585650 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -11,6 +11,7 @@ > #include "dt-bindings/input/input.h" > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mq.h> > #include "imx8mq-pinfunc.h" > > / { > @@ -1045,6 +1046,29 @@ > }; > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc"; > + reg = <0x32700000 0x100000>; > + clocks = <&clk IMX8MQ_CLK_NOC>; > + fsl,ddrc = <&ddrc>; > + #interconnect-cells = <1>; > + operating-points-v2 = <&noc_opp_table>; > + > + noc_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-133M { > + opp-hz = /bits/ 64 <133333333>; > + }; > + opp-400M { > + opp-hz = /bits/ 64 <400000000>; > + }; > + opp-800M { > + opp-hz = /bits/ 64 <800000000>; > + }; > + }; > + }; > + > bus@32c00000 { /* AIPS4 */ > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>; > -- > 2.7.4 >
On 7/7/20 00:13, Abel Vesa wrote: > From: Leonard Crestez <leonard.crestez@nxp.com> > > Add nodes for the main interconnect of the imx8m series chips. > > These nodes are bound to by devfreq and interconnect drivers. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> > Acked-by: Georgi Djakov <georgi.djakov@linaro.org> > --- > > Changes since v1: > - picked up the bindinds header which were part of the original patch > from Leonard > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24 ++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 24 ++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 24 ++++++++++++++++++++++++ > 3 files changed, 72 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > index 76f040e..970d132 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mm.h> Nit: Seems like these are sorted alphabetically. Please maintain this. [..] > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mn.h> > ditto [..]> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -11,6 +11,7 @@ > #include "dt-bindings/input/input.h" > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > +#include <dt-bindings/interconnect/imx8mq.h> > #include "imx8mq-pinfunc.h" ditto Thanks, Georgi
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 76f040e..970d132 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/interconnect/imx8mm.h> #include "imx8mm-pinfunc.h" @@ -877,6 +878,29 @@ }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MM_CLK_NOC>; + fsl,ddrc = <&ddrc>; + #interconnect-cells = <1>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-150M { + opp-hz = /bits/ 64 <150000000>; + }; + opp-375M { + opp-hz = /bits/ 64 <375000000>; + }; + opp-750M { + opp-hz = /bits/ 64 <750000000>; + }; + }; + }; + aips4: bus@32c00000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x32c00000 0x400000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 9385dd7..cd38aae 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/interconnect/imx8mn.h> #include "imx8mn-pinfunc.h" @@ -764,6 +765,29 @@ }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mn-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MN_CLK_NOC>; + fsl,ddrc = <&ddrc>; + #interconnect-cells = <1>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100M { + opp-hz = /bits/ 64 <100000000>; + }; + opp-600M { + opp-hz = /bits/ 64 <600000000>; + }; + opp-800M { + opp-hz = /bits/ 64 <800000000>; + }; + }; + }; + aips4: bus@32c00000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x32c00000 0x400000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index f70435c..d585650 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -11,6 +11,7 @@ #include "dt-bindings/input/input.h" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/interconnect/imx8mq.h> #include "imx8mq-pinfunc.h" / { @@ -1045,6 +1046,29 @@ }; }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MQ_CLK_NOC>; + fsl,ddrc = <&ddrc>; + #interconnect-cells = <1>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-133M { + opp-hz = /bits/ 64 <133333333>; + }; + opp-400M { + opp-hz = /bits/ 64 <400000000>; + }; + opp-800M { + opp-hz = /bits/ 64 <800000000>; + }; + }; + }; + bus@32c00000 { /* AIPS4 */ compatible = "fsl,aips-bus", "simple-bus"; reg = <0x32c00000 0x400000>;