From patchwork Wed Jul 29 02:20:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11690215 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD6B113B6 for ; Wed, 29 Jul 2020 02:26:13 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 96B972070B for ; Wed, 29 Jul 2020 02:26:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Oogc5xvw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 96B972070B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=a4PDAhNWzqb0aj9maC1pMNNMfQh3Nycu//QncOoBfYI=; b=Oogc5xvwDWe33+vrDh8cXwjOWD PmfCDrOY97VSnrNjnrOyoVvJ3zCG5k0teoHW7s+sFUc2y2TI5rJZRvB+g6c+atX3pNAj3M2EnAlUL 1rNuITyrJspKZGZucP9mkeSRUaNFQ8sfCq/pI5a3i9CyoE/ulf/yPmU0EG9py3Dx7d6qUz95kVcDk pkPZEtuuXKoNJ48eArNAH5D4MIcSGYgLZ170Jvz6qjweHLz9vLFLPcAFjGEAXxC6uSvo3Ppzo8YRs uUf5jY+6gqrsbQ59c/xfknvPhSg/S0Porpm7Vl7nWHTFo8X77Cd8UIWFRMXlG+I7woqynEmLRKamC 586CDDtQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0blx-0004l0-5i; Wed, 29 Jul 2020 02:24:49 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0blu-0004k7-H5 for linux-arm-kernel@lists.infradead.org; Wed, 29 Jul 2020 02:24:47 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DAA71200100; Wed, 29 Jul 2020 04:24:44 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 90D1E200D82; Wed, 29 Jul 2020 04:24:40 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3B70B402DF; Wed, 29 Jul 2020 04:24:35 +0200 (CEST) From: Anson Huang To: wim@linux-watchdog.org, linux@roeck-us.net, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 1/2] watchdog: imx7ulp: Strictly follow the sequence for wdog operations Date: Wed, 29 Jul 2020 10:20:26 +0800 Message-Id: <1595989227-24700-1-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200728_222446_786333_148A0E47 X-CRM114-Status: GOOD ( 15.01 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.21 listed in list.dnswl.org] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-imx@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org According to reference manual, the i.MX7ULP WDOG's operations should follow below sequence: 1. disable global interrupts; 2. unlock the wdog and wait unlock bit set; 3. reconfigure the wdog and wait for reconfiguration bit set; 4. enabel global interrupts. Strictly follow the recommended sequence can make it more robust. Signed-off-by: Anson Huang --- Changes since V1: - use readl_poll_timeout_atomic() instead of usleep_ranges() since IRQ is disabled. --- drivers/watchdog/imx7ulp_wdt.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/watchdog/imx7ulp_wdt.c b/drivers/watchdog/imx7ulp_wdt.c index 7993c8c..7d2b12e 100644 --- a/drivers/watchdog/imx7ulp_wdt.c +++ b/drivers/watchdog/imx7ulp_wdt.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -36,6 +37,7 @@ #define DEFAULT_TIMEOUT 60 #define MAX_TIMEOUT 128 #define WDOG_CLOCK_RATE 1000 +#define WDOG_WAIT_TIMEOUT 10000 static bool nowayout = WATCHDOG_NOWAYOUT; module_param(nowayout, bool, 0000); @@ -48,17 +50,31 @@ struct imx7ulp_wdt_device { struct clk *clk; }; +static inline void imx7ulp_wdt_wait(void __iomem *base, u32 mask) +{ + u32 val = readl(base + WDOG_CS); + + if (!(val & mask)) + WARN_ON(readl_poll_timeout_atomic(base + WDOG_CS, val, + val & mask, 0, + WDOG_WAIT_TIMEOUT)); +} + static void imx7ulp_wdt_enable(struct watchdog_device *wdog, bool enable) { struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog); u32 val = readl(wdt->base + WDOG_CS); + local_irq_disable(); writel(UNLOCK, wdt->base + WDOG_CNT); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_ULK); if (enable) writel(val | WDOG_CS_EN, wdt->base + WDOG_CS); else writel(val & ~WDOG_CS_EN, wdt->base + WDOG_CS); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_RCS); + local_irq_enable(); } static bool imx7ulp_wdt_is_enabled(void __iomem *base) @@ -72,7 +88,12 @@ static int imx7ulp_wdt_ping(struct watchdog_device *wdog) { struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog); + local_irq_disable(); + writel(UNLOCK, wdt->base + WDOG_CNT); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_ULK); writel(REFRESH, wdt->base + WDOG_CNT); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_RCS); + local_irq_enable(); return 0; } @@ -98,8 +119,12 @@ static int imx7ulp_wdt_set_timeout(struct watchdog_device *wdog, struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog); u32 val = WDOG_CLOCK_RATE * timeout; + local_irq_disable(); writel(UNLOCK, wdt->base + WDOG_CNT); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_ULK); writel(val, wdt->base + WDOG_TOVAL); + imx7ulp_wdt_wait(wdt->base, WDOG_CS_RCS); + local_irq_enable(); wdog->timeout = timeout; @@ -140,15 +165,19 @@ static void imx7ulp_wdt_init(void __iomem *base, unsigned int timeout) { u32 val; + local_irq_disable(); /* unlock the wdog for reconfiguration */ writel_relaxed(UNLOCK_SEQ0, base + WDOG_CNT); writel_relaxed(UNLOCK_SEQ1, base + WDOG_CNT); + imx7ulp_wdt_wait(base, WDOG_CS_ULK); /* set an initial timeout value in TOVAL */ writel(timeout, base + WDOG_TOVAL); /* enable 32bit command sequence and reconfigure */ val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE; writel(val, base + WDOG_CS); + imx7ulp_wdt_wait(base, WDOG_CS_RCS); + local_irq_enable(); } static void imx7ulp_wdt_action(void *data)