From patchwork Tue Aug 23 10:40:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1088032 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7NAf4L5013975 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 23 Aug 2011 10:41:24 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvoPf-0001dr-50; Tue, 23 Aug 2011 10:40:55 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QvoPe-0006QY-Mu; Tue, 23 Aug 2011 10:40:54 +0000 Received: from mail-ey0-f171.google.com ([209.85.215.171]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QvoPb-0006QF-2r for linux-arm-kernel@lists.infradead.org; Tue, 23 Aug 2011 10:40:51 +0000 Received: by eyg24 with SMTP id 24so5466590eyg.30 for ; Tue, 23 Aug 2011 03:40:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:user-agent:in-reply-to :references:mime-version:content-transfer-encoding:content-type; bh=1km3lATSSbOdcyypWLh0r+/95VH7t5X4MZOFo9qJcL0=; b=naUJ+Vabwj58cpQfsrpT5aMXJop//xlmPI94tzSg6EwnBmW2F9LpeAC+iFhUXH3bVQ 2ypwkzYFl8mTJwN1UHwzDlpTEvAAs3p5NnKuJDm+W/LW42rO899Tj31BJmofh7u59PcY NA5IoViPOTyLP1H6r+vesGxhyH7I2uuJsKVmE= Received: by 10.213.105.146 with SMTP id t18mr481381ebo.86.1314096047245; Tue, 23 Aug 2011 03:40:47 -0700 (PDT) Received: from flatron.localnet (178-73-0-134.home.aster.pl [178.73.0.134]) by mx.google.com with ESMTPS id q8sm23382eea.25.2011.08.23.03.40.45 (version=SSLv3 cipher=OTHER); Tue, 23 Aug 2011 03:40:45 -0700 (PDT) From: Tomasz Figa To: Kukjin Kim Subject: [PATCH 4/4 v3] ARM: s3c64xx: Add support for synchronous clock operation. Date: Tue, 23 Aug 2011 12:40:44 +0200 Message-ID: <1597277.ZvWPFlKtBI@flatron> User-Agent: KMail/4.7.0 (Linux/3.0.3-gentoo; KDE/4.7.0; x86_64; ; ) In-Reply-To: <06be01cc613e$3ecc8840$bc6598c0$%kim@samsung.com> References: <2499662.GIrUU4Kkuf@flatron> <2171056.Pcz41msqen@flatron> <06be01cc613e$3ecc8840$bc6598c0$%kim@samsung.com> MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110823_064051_355657_E78A91C1 X-CRM114-Status: GOOD ( 13.34 ) X-Spam-Score: -0.8 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (tomasz.figa[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.171 listed in list.dnswl.org] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: "'Ben Dooks'" , "'linux-arm-kernel'" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 23 Aug 2011 10:41:24 +0000 (UTC) From 1518d67b93432272312a55c4602040c580f46a0c Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Fri, 19 Aug 2011 11:54:31 +0200 Subject: [PATCH 4/4 v3] ARM: s3c64xx: Add support for synchronous clock operation. Some boards based on S3C6410 use synchronous clocking, which means that HCLKx2 and other system clocks are generated from APLL instead of MPLL. This patch adds support for such boards, by calculating hclk2 depending on the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS regist Signed-off-by: Tomasz Figa --- arch/arm/mach-s3c64xx/clock.c | 8 +++++++- arch/arm/mach-s3c64xx/include/mach/regs-sys.h | 1 + 2 files changed, 8 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fdfc4d5..a7dab43 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -780,7 +780,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", apll, mpll, epll); - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) + /* Synchronous mode */ + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + else + /* Asynchronous mode */ + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); + hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h index 774e0de..b91e020 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h @@ -26,5 +26,6 @@ #define S3C64XX_OTHERS S3C_SYSREG(0x900) #define S3C64XX_OTHERS_USBMASK (1 << 16) +#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) #endif /* _PLAT_REGS_SYS_H */