diff mbox series

[v1,RESEND] ARM64: dts: imx8mp: correct sdma1 clk setting

Message ID 1598955709-28688-1-git-send-email-yibin.gong@nxp.com (mailing list archive)
State New, archived
Headers show
Series [v1,RESEND] ARM64: dts: imx8mp: correct sdma1 clk setting | expand

Commit Message

Robin Gong Sept. 1, 2020, 10:21 a.m. UTC 
Correct sdma1 ahb clk, otherwise wrong 1:1 clk ratio will be chosed so
that sdma1 function broken. sdma1 should use 1:2 clk, while sdma2/3 use
1:1.

Fixes: 6d9b8d20431f ("arm64: dts: freescale: Add i.MX8MP dtsi support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Shawn Guo Sept. 5, 2020, 7:01 a.m. UTC | #1 
On Tue, Sep 01, 2020 at 06:21:49PM +0800, Robin Gong wrote:
> Correct sdma1 ahb clk, otherwise wrong 1:1 clk ratio will be chosed so
> that sdma1 function broken. sdma1 should use 1:2 clk, while sdma2/3 use
> 1:1.
> 
> Fixes: 6d9b8d20431f ("arm64: dts: freescale: Add i.MX8MP dtsi support")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Robin Gong <yibin.gong@nxp.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index cad2dd7..6038f66 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -702,7 +702,7 @@ 
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MP_CLK_SDMA1_ROOT>,
-					 <&clk IMX8MP_CLK_SDMA1_ROOT>;
+					 <&clk IMX8MP_CLK_AHB>;
 				clock-names = "ipg", "ahb";
 				#dma-cells = <3>;
 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";