From patchwork Thu Sep 3 07:01:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Shi X-Patchwork-Id: 11752523 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1FDAA13B1 for ; Thu, 3 Sep 2020 07:03:21 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA44820716 for ; Thu, 3 Sep 2020 07:03:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="2JZ9cOnu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EA44820716 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=F2WqKqQxnUha7Q0NFm17T0FkGabDT6KTqg/NBPsQyXs=; b=2JZ9cOnuXC5DMIgGB1IbMvjEte BIZ6hs+wSW6o5667QeCOVJYTxjY9svQrewjk+8S08t7125N1NJYTB9SzNPdK0F9vPTeQvTxMAXdHH rNBzenMD63/KkE5gkism0ppxgYhIkPydF+7uFK/1Sv9xxY6rIE1JzWcyb86ZdotW1c2lLhoTtAK0w ZlUR552uvt9sFKB6k4dUW4LdNkiK03ncc2Tl8irqP6TelJsvuPAVlSpAaQTTzEVgGqZT/xDN2XeIv N/xZF7fdeJsqyPqVI2bI7p8jFG6ejpXlIrr7RqoLfT919KDUCSS3PnYWxIRn+mZf4qFJmaYzZRK47 kGRXCCHw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kDjFg-0007Dv-Dl; Thu, 03 Sep 2020 07:01:44 +0000 Received: from out30-42.freemail.mail.aliyun.com ([115.124.30.42]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kDjFd-0007Ce-Lm for linux-arm-kernel@lists.infradead.org; Thu, 03 Sep 2020 07:01:43 +0000 X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R121e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=e01e07425; MF=alex.shi@linux.alibaba.com; NM=1; PH=DS; RN=19; SR=0; TI=SMTPD_---0U7n-ifu_1599116494; Received: from aliy80.localdomain(mailfrom:alex.shi@linux.alibaba.com fp:SMTPD_---0U7n-ifu_1599116494) by smtp.aliyun-inc.com(127.0.0.1); Thu, 03 Sep 2020 15:01:36 +0800 From: Alex Shi To: Anshuman Khandual , David Hildenbrand , Matthew Wilcox , Vlastimil Babka , Alexander Duyck Subject: [PATCH v4 3/4] mm/pageblock: work around multiple arch's cmpxchg support issue Date: Thu, 3 Sep 2020 15:01:22 +0800 Message-Id: <1599116482-7410-3-git-send-email-alex.shi@linux.alibaba.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1599116482-7410-1-git-send-email-alex.shi@linux.alibaba.com> References: <1599116482-7410-1-git-send-email-alex.shi@linux.alibaba.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200903_030141_933601_DF48918C X-CRM114-Status: GOOD ( 17.09 ) X-Spam-Score: -8.0 (--------) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-8.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -7.5 USER_IN_DEF_SPF_WL From: address is in the default SPF white-list 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [115.124.30.42 listed in list.dnswl.org] 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines -0.5 ENV_AND_HDR_SPF_MATCH Env and Hdr From used in default SPF WL Match X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Zankel , Rich Felker , Yoshinori Sato , linux-sh@vger.kernel.org, linux-xtensa@linux-xtensa.org, Russell King , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Max Filippov , Baolin Wang , sparclinux@vger.kernel.org, Andrew Morton , "David S. Miller" , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Armv6, sh2, sparc32 and xtensa can not do cmpxchg1, so we have to use cmpxchg4 on it. Here we mark above 4 arch's NO_CMPXCHG_BYTE, and would add more if we found. This is the first usages of cmpxchg flase sharing change. We'd better check more cmpxchg usages in current kernel... Reported-by: kernel test robot Signed-off-by: Alex Shi Cc: Andrew Morton Cc: Baolin Wang Cc: Russell King Cc: Yoshinori Sato Cc: Rich Felker Cc: "David S. Miller" Cc: Chris Zankel Cc: Max Filippov Cc: Andrew Morton Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sh@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: linux-xtensa@linux-xtensa.org Cc: linux-mm@kvack.org --- arch/Kconfig | 3 +++ arch/arm/Kconfig | 1 + arch/sh/Kconfig | 1 + arch/sparc/Kconfig | 1 + arch/xtensa/Kconfig | 1 + include/linux/mmzone.h | 15 ++++++++++++--- mm/page_alloc.c | 22 +++++++++++----------- 7 files changed, 30 insertions(+), 14 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index af14a567b493..3514570c0f5f 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -431,6 +431,9 @@ config HAVE_CMPXCHG_LOCAL config HAVE_CMPXCHG_DOUBLE bool +config NO_CMPXCHG_BYTE + bool + config ARCH_WEAK_RELEASE_ACQUIRE bool diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e00d94b16658..03a6c7fd999d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -48,6 +48,7 @@ config ARM select GENERIC_ALLOCATOR select GENERIC_ARCH_TOPOLOGY if ARM_CPU_TOPOLOGY select GENERIC_ATOMIC64 if CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI + select NO_CMPXCHG_BYTE if CPU_V6 select GENERIC_CLOCKEVENTS_BROADCAST if SMP select GENERIC_CPU_AUTOPROBE select GENERIC_EARLY_IOREMAP diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index d20927128fce..4c7f0ad5b93f 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -155,6 +155,7 @@ menu "System type" config CPU_SH2 bool select SH_INTC + select NO_CMPXCHG_BYTE config CPU_SH2A bool diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index efeff2c896a5..51ae5c8ede87 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -58,6 +58,7 @@ config SPARC32 select CLZ_TAB select HAVE_UID16 select OLD_SIGACTION + select NO_CMPXCHG_BYTE config SPARC64 def_bool 64BIT diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index e997e0119c02..862b008ab09e 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -42,6 +42,7 @@ config XTENSA select MODULES_USE_ELF_RELA select PERF_USE_VMALLOC select VIRT_TO_BUS + select NO_CMPXCHG_BYTE help Xtensa processors are 32-bit RISC machines designed by Tensilica primarily for embedded systems. These processors are both diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index be676e659fb7..0bc5ac0f8cd7 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -406,6 +406,15 @@ enum zone_type { #ifndef __GENERATING_BOUNDS_H +/* cmpxchg only support 32-bits operands on ARMv6, SPARC32, sh2, XTENSA.*/ +#ifdef CONFIG_NO_CMPXCHG_BYTE +#define BITS_PER_FLAGS BITS_PER_LONG +typedef unsigned long pageblockflags_t; +#else +#define BITS_PER_FLAGS BITS_PER_BYTE +typedef unsigned char pageblockflags_t; +#endif + struct zone { /* Read-mostly fields */ @@ -437,7 +446,7 @@ struct zone { * Flags for a pageblock_nr_pages block. See pageblock-flags.h. * In SPARSEMEM, this map is stored in struct mem_section */ - unsigned char *pageblock_flags; + pageblockflags_t *pageblock_flags; #endif /* CONFIG_SPARSEMEM */ /* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */ @@ -1159,7 +1168,7 @@ struct mem_section_usage { DECLARE_BITMAP(subsection_map, SUBSECTIONS_PER_SECTION); #endif /* See declaration of similar field in struct zone */ - unsigned char pageblock_flags[0]; + pageblockflags_t pageblock_flags[0]; }; void subsection_map_init(unsigned long pfn, unsigned long nr_pages); @@ -1212,7 +1221,7 @@ struct mem_section { extern struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT]; #endif -static inline unsigned char *section_to_usemap(struct mem_section *ms) +static inline pageblockflags_t *section_to_usemap(struct mem_section *ms) { return ms->usage->pageblock_flags; } diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 3688e6b83318..8b65d83d8be6 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -445,7 +445,7 @@ static inline bool defer_init(int nid, unsigned long pfn, unsigned long end_pfn) #endif /* Return a pointer to the bitmap storing bits affecting a block of pages */ -static inline unsigned char *get_pageblock_bitmap(struct page *page, +static inline pageblockflags_t *get_pageblock_bitmap(struct page *page, unsigned long pfn) { #ifdef CONFIG_SPARSEMEM @@ -474,24 +474,24 @@ static inline int pfn_to_bitidx(struct page *page, unsigned long pfn) * Return: pageblock_bits flags */ static __always_inline -unsigned char __get_pfnblock_flags_mask(struct page *page, +pageblockflags_t __get_pfnblock_flags_mask(struct page *page, unsigned long pfn, unsigned long mask) { - unsigned char *bitmap; + pageblockflags_t *bitmap; unsigned long bitidx, byte_bitidx; - unsigned char byte; + pageblockflags_t byte; bitmap = get_pageblock_bitmap(page, pfn); bitidx = pfn_to_bitidx(page, pfn); - byte_bitidx = bitidx / BITS_PER_BYTE; - bitidx &= (BITS_PER_BYTE-1); + byte_bitidx = bitidx / BITS_PER_FLAGS; + bitidx &= (BITS_PER_FLAGS - 1); byte = bitmap[byte_bitidx]; return (byte >> bitidx) & mask; } -unsigned char get_pfnblock_flags_mask(struct page *page, unsigned long pfn, +pageblockflags_t get_pfnblock_flags_mask(struct page *page, unsigned long pfn, unsigned long mask) { return __get_pfnblock_flags_mask(page, pfn, mask); @@ -513,16 +513,16 @@ void set_pfnblock_flags_mask(struct page *page, unsigned long flags, unsigned long pfn, unsigned long mask) { - unsigned char *bitmap; + pageblockflags_t *bitmap; unsigned long bitidx, byte_bitidx; - unsigned char old_byte, byte; + pageblockflags_t old_byte, byte; - BUILD_BUG_ON(NR_PAGEBLOCK_BITS != BITS_PER_BYTE); + BUILD_BUG_ON(NR_PAGEBLOCK_BITS != BITS_PER_FLAGS); BUILD_BUG_ON(MIGRATE_TYPES > (1 << PB_migratetype_bits)); bitmap = get_pageblock_bitmap(page, pfn); bitidx = pfn_to_bitidx(page, pfn); - byte_bitidx = bitidx / BITS_PER_BYTE; + byte_bitidx = bitidx / BITS_PER_FLAGS; VM_BUG_ON_PAGE(!zone_spans_pfn(page_zone(page), pfn), page);