From patchwork Wed Oct 14 08:57:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11837079 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45B8E61C for ; Wed, 14 Oct 2020 09:03:55 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ED7EA20878 for ; Wed, 14 Oct 2020 09:03:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YHjaXOte" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ED7EA20878 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=Dhb77eKbyAWfZzWC1mF65YaNA5dpef1C38Ic/UC/l5A=; b=YHjaXOteL869aAxxVDrOeLOld8 g+wwrrrMaT1+TW6WC/H38NIg7MpgeGzKQct3CX0+Pc+RoeM/YCPTo+Bz2ZHGyKb9lMXY4I6fMa+gW JEhMax81o+hvDTcua6J/yB6ZDc3tdzswHJDlJqdUDTaRrkUD5Pka2vyzkmO/UtFAnAPJJBFHnUiXS VQ83x7Ndrac9RQL9BDokuAlILvY9BBaiVFXffk8cC77cMxp1wziYGkLj03jeQqh+sg6IId0DXVhFP s75GwN/uQbygplwBgSArejDXRf+bcJH13SnhGtXqxlQnGiKwAX06MU8KCYUu1kG2cOdihhaHuWemp CPCWb/2Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kScfq-0003vv-IA; Wed, 14 Oct 2020 09:02:18 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kScfn-0003v9-JF for linux-arm-kernel@lists.infradead.org; Wed, 14 Oct 2020 09:02:16 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DFCBA20034F; Wed, 14 Oct 2020 11:02:12 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D1C74200271; Wed, 14 Oct 2020 11:02:08 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8873240249; Wed, 14 Oct 2020 11:02:03 +0200 (CEST) From: Joakim Zhang To: shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH] firmware: imx: always export scu symbols Date: Wed, 14 Oct 2020 16:57:14 +0800 Message-Id: <1602665834-29902-1-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201014_050215_744656_D8DD9BA4 X-CRM114-Status: GOOD ( 10.75 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.21 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Fan , Liu Ying , linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Liu Ying Always export scu symbols for both SCU SoCs and non-SCU SoCs to avoid build error. Signed-off-by: Liu Ying Signed-off-by: Peng Fan Signed-off-by: Joakim Zhang --- include/linux/firmware/imx/ipc.h | 15 +++++++++++++++ include/linux/firmware/imx/svc/misc.h | 23 +++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/include/linux/firmware/imx/ipc.h b/include/linux/firmware/imx/ipc.h index 891057434858..300fa253fc30 100644 --- a/include/linux/firmware/imx/ipc.h +++ b/include/linux/firmware/imx/ipc.h @@ -34,6 +34,7 @@ struct imx_sc_rpc_msg { uint8_t func; }; +#if IS_ENABLED(CONFIG_IMX_SCU) /* * This is an function to send an RPC message over an IPC channel. * It is called by client-side SCFW API function shims. @@ -55,4 +56,18 @@ int imx_scu_call_rpc(struct imx_sc_ipc *ipc, void *msg, bool have_resp); * @return Returns an error code (0 = success, failed if < 0) */ int imx_scu_get_handle(struct imx_sc_ipc **ipc); + +#else +static inline int +imx_scu_call_rpc(struct imx_sc_ipc *ipc, void *msg, bool have_resp) +{ + return -EIO; +} + +static inline int imx_scu_get_handle(struct imx_sc_ipc **ipc) +{ + return -EIO; +} +#endif + #endif /* _SC_IPC_H */ diff --git a/include/linux/firmware/imx/svc/misc.h b/include/linux/firmware/imx/svc/misc.h index 031dd4d3c766..d255048f17de 100644 --- a/include/linux/firmware/imx/svc/misc.h +++ b/include/linux/firmware/imx/svc/misc.h @@ -46,6 +46,7 @@ enum imx_misc_func { * Control Functions */ +#if IS_ENABLED(CONFIG_IMX_SCU) int imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, u8 ctrl, u32 val); @@ -55,4 +56,26 @@ int imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource, int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource, bool enable, u64 phys_addr); +#else +static inline int +imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, + u8 ctrl, u32 val) +{ + return -EIO; +} + +static inline int +imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource, + u8 ctrl, u32 *val) +{ + return -EIO; +} + +static inline int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource, + bool enable, u64 phys_addr) +{ + return -EIO; +} +#endif + #endif /* _SC_MISC_API_H */