From patchwork Sat Oct 24 07:58:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxin Yu X-Patchwork-Id: 11854777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14C2AC2D0A3 for ; Sat, 24 Oct 2020 08:10:49 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 841A32177B for ; Sat, 24 Oct 2020 08:10:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VfFt227x"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="EdThZFgq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 841A32177B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2IjTmNA1hnKO85280SoHHJqO1ZcrW+cCiD8EfCJbr7I=; b=VfFt227xx4FyOp6ODlqFEzZ3E QbRyy56xE1Am7GYX2CkZzqrEgUyijBGC9ip9zMiLW3sja1rhBW5i894T3aDAq6DO4mmYUxhrNTNz0 IsfoXmzvDHWojPorQQaizuDxh624Kwie8ZjRUy22uc140aGFMNUhoNtuHI2lsxeNITDPHy3a0aZXt AX/qwEbdhE6y9x3nNLnk8RHxn2asS923aglaJKe6PeUgNArZbihu9282RF/603e0TqjRmDb7Qmis4 mLJJFCtOdVYaOH8gfHRnM737Ylnkrd6YYfAqdrkPIzsFjBPzNvbDt/OpZmvGB3LklJ+3HRxaEAo7J SexgvU/rg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kWEcD-0002I8-Vh; Sat, 24 Oct 2020 08:09:30 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kWEcB-0002HI-Ck; Sat, 24 Oct 2020 08:09:28 +0000 X-UUID: 260f804dc1364cb7ad254bd72301d414-20201024 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3AjCwyELXJsAF7KDdOI9+UHESz6oEunbkSh/sKmq2DQ=; b=EdThZFgqrJGZSDlJhbthkDxNUG3fEfmRQ73mWYKKxI5BMV+uRpdUKgK2fzXpyxvRno2VIrSJIXrCY4fETnv6Y7EMYdfekCbZglYUfmokOofIsue5RwNvbj1SJru42BMxbvDW3QA3Tm7W6jsrfz6AM/LQzkyCqd4q2GqlluNiF2w=; X-UUID: 260f804dc1364cb7ad254bd72301d414-20201024 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 855431842; Sat, 24 Oct 2020 00:09:25 -0800 Received: from MTKMBS02N2.mediatek.inc (172.21.101.101) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 24 Oct 2020 00:59:22 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 24 Oct 2020 15:59:06 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 24 Oct 2020 15:59:05 +0800 From: Jiaxin Yu To: , , , , , , , , , Subject: [PATCH v3 7/9] dt-bindings: mediatek: mt8192: add audio afe document Date: Sat, 24 Oct 2020 15:58:57 +0800 Message-ID: <1603526339-15005-8-git-send-email-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1603526339-15005-1-git-send-email-jiaxin.yu@mediatek.com> References: <1603526339-15005-1-git-send-email-jiaxin.yu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 752CD73EACB22FF28118C6D94BA59127F50E0A8B90263C55B5BCF1A76A41BD472000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201024_040927_555657_91718748 X-CRM114-Status: GOOD ( 12.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shane.chien@mediatek.com, Bicycle.Tsai@mediatek.com, Jiaxin Yu , Trevor.Wu@mediatek.com, kuninori.morimoto.gx@renesas.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds mt8192 audio afe document. Signed-off-by: Jiaxin Yu --- This patch depends on following series that has not been accepted: https://patchwork.kernel.org/cover/11752231 (dt-bindings/clock/mt8192-clk.h is included in it.) https://patchwork.kernel.org/patch/11755895 (dt-bindings/power/mt8192-power.h is included in it.) https://lore.kernel.org/patchwork/patch/1321118 (dt-bindings/reset-controller/mt8192-resets.h is included in it.) .../bindings/sound/mt8192-afe-pcm.yaml | 100 ++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml new file mode 100644 index 0000000000000..0170c93802d29 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AFE PCM controller for mt8192 + +maintainers: + - Jiaxin Yu + - Shane Chien + +properties: + compatible: + const: mediatek,mt8192-audio + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + const: audiosys + + mediatek,apmixedsys: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of the mediatek apmixedsys controller + + mediatek,infracfg: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of the mediatek infracfg controller + + mediatek,topckgen: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of the mediatek topckgen controller + + power-domains: + maxItems: 1 + + clocks: + items: + - description: AFE clock + - description: ADDA DAC clock + - description: ADDA DAC pre-distortion clock + - description: audio infra sys clock + - description: audio infra 26M clock + + clock-names: + items: + - const: aud_afe_clk + - const: aud_dac_clk + - const: aud_dac_predis_clk + - const: aud_infra_clk + - const: aud_infra_26m_clk + +required: + - compatible + - interrupts + - resets + - reset-names + - mediatek,apmixedsys + - mediatek,infracfg + - mediatek,topckgen + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + afe: mt8192-afe-pcm { + compatible = "mediatek,mt8192-audio"; + interrupts = ; + resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>; + reset-names = "audiosys"; + mediatek,apmixedsys = <&apmixedsys>; + mediatek,infracfg = <&infracfg>; + mediatek,topckgen = <&topckgen>; + power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; + clocks = <&audsys CLK_AUD_AFE>, + <&audsys CLK_AUD_DAC>, + <&audsys CLK_AUD_DAC_PREDIS>, + <&infracfg CLK_INFRA_AUDIO>, + <&infracfg CLK_INFRA_AUDIO_26M_B>; + clock-names = "aud_afe_clk", + "aud_dac_clk", + "aud_dac_predis_clk", + "aud_infra_clk", + "aud_infra_26m_clk"; + }; + +...