diff mbox series

[v5,13/14] arm64: dts: imx8mp: Add media_blk_ctl node

Message ID 1604402306-5348-14-git-send-email-abel.vesa@nxp.com (mailing list archive)
State New, archived
Headers show
Series Add BLK_CTL support for i.MX8MP | expand

Commit Message

Abel Vesa Nov. 3, 2020, 11:18 a.m. UTC 
Some of the features of the media_ctl will be used by some
different drivers in a way those drivers will know best, so adding the
syscon compatible we allow those to do just that. Only the resets
and the clocks are registered bit the clk-blk-ctl driver.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 3716119..8e1a01f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -743,6 +743,21 @@ 
 			};
 		};
 
+		aips4: bus@32c00000 {
+			compatible = "simple-bus";
+			reg = <0x32c00000 0x400000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			media_blk_ctl: clock-controller@32ec0000 {
+				compatible = "fsl,imx8mp-media-blk-ctl", "syscon";
+				reg = <0x32ec0000 0x10000>;
+				#clock-cells = <1>;
+				#reset-cells = <1>;
+			};
+		};
+
 		aips5: bus@30c00000 {
 			compatible = "fsl,aips-bus", "simple-bus";
 			reg = <0x30c00000 0x400000>;