| Message ID | 1607591262-21736-2-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/mediatek: add support for mediatek SOC MT8183 | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月10日 週四 下午5:22寫道： > > rdma fifo size may be different even in same SOC, add this > property to the corresponding rdma > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index 1212207..64c64ee 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -66,6 +66,13 @@ Required properties (DMA function blocks): > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > for details. > > +Optional properties (RDMA function blocks): > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this > + property to the corresponding rdma > + the value is the Max value which defined in hardware data sheet. > + rdma_fifo_size of rdma0 in mt8183 is 5120 > + rdma_fifo_size of rdma1 in mt8183 is 2048 > + > Examples: > > mmsys: clock-controller@14000000 { > @@ -207,3 +214,12 @@ od@14023000 { > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > clocks = <&mmsys CLK_MM_DISP_OD>; > }; > + > +rdma1: rdma@1400c000 { > + compatible = "mediatek,mt8183-disp-rdma"; > + reg = <0 0x1400c000 0 0x1000>; > + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > + mediatek,rdma_fifo_size = <2048>; > +}; In [1], Rob has suggest that not add example of rdma1, it's better to add mediatek,rdma_fifo_size in rdma0 for example. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1596855231-5782-2-git-send-email-yongqiang.niu@mediatek.com/ Regards, Chun-Kuang. > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Thu, 2020-12-10 at 23:40 +0800, Chun-Kuang Hu wrote: > Hi, Yongqiang: > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月10日 週四 下午5:22寫道： > > > > rdma fifo size may be different even in same SOC, add this > > property to the corresponding rdma > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > --- > > .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > index 1212207..64c64ee 100644 > > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > @@ -66,6 +66,13 @@ Required properties (DMA function blocks): > > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > for details. > > > > +Optional properties (RDMA function blocks): > > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this > > + property to the corresponding rdma > > + the value is the Max value which defined in hardware data sheet. > > + rdma_fifo_size of rdma0 in mt8183 is 5120 > > + rdma_fifo_size of rdma1 in mt8183 is 2048 > > + > > Examples: > > > > mmsys: clock-controller@14000000 { > > @@ -207,3 +214,12 @@ od@14023000 { > > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > > clocks = <&mmsys CLK_MM_DISP_OD>; > > }; > > + > > +rdma1: rdma@1400c000 { > > + compatible = "mediatek,mt8183-disp-rdma"; > > + reg = <0 0x1400c000 0 0x1000>; > > + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; > > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > > + mediatek,rdma_fifo_size = <2048>; > > +}; > > In [1], Rob has suggest that not add example of rdma1, it's better to > add mediatek,rdma_fifo_size in rdma0 for example. > > [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1596855231-5782-2-git-send-email-yongqiang.niu@mediatek.com/ > > Regards, > Chun-Kuang. the description of rdma0 is mt8173, and mt8173 rdma driver set the correspond fifo size already ok like this: static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { .fifo_size = SZ_8K, }; please double confirm shall we add this information into rdma0 description. > > > -- > > 1.8.1.1.dirty > > _______________________________________________ > > Linux-mediatek mailing list > > Linux-mediatek@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Thu, Dec 10, 2020 at 05:07:37PM +0800, Yongqiang Niu wrote: > rdma fifo size may be different even in same SOC, add this > property to the corresponding rdma > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > index 1212207..64c64ee 100644 > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > @@ -66,6 +66,13 @@ Required properties (DMA function blocks): > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > for details. > > +Optional properties (RDMA function blocks): > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this mediatek,rdma-fifo-size > + property to the corresponding rdma > + the value is the Max value which defined in hardware data sheet. > + rdma_fifo_size of rdma0 in mt8183 is 5120 > + rdma_fifo_size of rdma1 in mt8183 is 2048 > + > Examples: > > mmsys: clock-controller@14000000 { > @@ -207,3 +214,12 @@ od@14023000 { > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > clocks = <&mmsys CLK_MM_DISP_OD>; > }; > + > +rdma1: rdma@1400c000 { > + compatible = "mediatek,mt8183-disp-rdma"; > + reg = <0 0x1400c000 0 0x1000>; > + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > + mediatek,rdma_fifo_size = <2048>; > +}; > -- > 1.8.1.1.dirty >
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月11日 週五 上午8:43寫道： > > On Thu, 2020-12-10 at 23:40 +0800, Chun-Kuang Hu wrote: > > Hi, Yongqiang: > > > > Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年12月10日 週四 下午5:22寫道： > > > > > > rdma fifo size may be different even in same SOC, add this > > > property to the corresponding rdma > > > > > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > > > --- > > > .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ > > > 1 file changed, 16 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > > index 1212207..64c64ee 100644 > > > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt > > > @@ -66,6 +66,13 @@ Required properties (DMA function blocks): > > > argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt > > > for details. > > > > > > +Optional properties (RDMA function blocks): > > > +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this > > > + property to the corresponding rdma > > > + the value is the Max value which defined in hardware data sheet. > > > + rdma_fifo_size of rdma0 in mt8183 is 5120 > > > + rdma_fifo_size of rdma1 in mt8183 is 2048 > > > + > > > Examples: > > > > > > mmsys: clock-controller@14000000 { > > > @@ -207,3 +214,12 @@ od@14023000 { > > > power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > > > clocks = <&mmsys CLK_MM_DISP_OD>; > > > }; > > > + > > > +rdma1: rdma@1400c000 { > > > + compatible = "mediatek,mt8183-disp-rdma"; > > > + reg = <0 0x1400c000 0 0x1000>; > > > + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; > > > + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > > + clocks = <&mmsys CLK_MM_DISP_RDMA1>; > > > + mediatek,rdma_fifo_size = <2048>; > > > +}; > > > > In [1], Rob has suggest that not add example of rdma1, it's better to > > add mediatek,rdma_fifo_size in rdma0 for example. > > > > [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1596855231-5782-2-git-send-email-yongqiang.niu@mediatek.com/ > > > > Regards, > > Chun-Kuang. > > the description of rdma0 is mt8173, and mt8173 rdma driver set the > correspond fifo size already ok like this: > static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = { > .fifo_size = SZ_8K, > }; > > please double confirm shall we add this information into rdma0 > description. > Device tree is used to describe hardware. That means device tree description should not consider your driver's implementation. mediatek,rdma-fifo-size of mt8173-rdma0 is 8K, so I could write this information in device node because this hardware is. Regards, Chun-Kuang. > > > > > > -- > > > 1.8.1.1.dirty > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek >
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index 1212207..64c64ee 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -66,6 +66,13 @@ Required properties (DMA function blocks): argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. +Optional properties (RDMA function blocks): +- mediatek,rdma_fifo_size: rdma fifo size may be different even in same SOC, add this + property to the corresponding rdma + the value is the Max value which defined in hardware data sheet. + rdma_fifo_size of rdma0 in mt8183 is 5120 + rdma_fifo_size of rdma1 in mt8183 is 2048 + Examples: mmsys: clock-controller@14000000 { @@ -207,3 +214,12 @@ od@14023000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OD>; }; + +rdma1: rdma@1400c000 { + compatible = "mediatek,mt8183-disp-rdma"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + mediatek,rdma_fifo_size = <2048>; +};
rdma fifo size may be different even in same SOC, add this property to the corresponding rdma Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- .../bindings/display/mediatek/mediatek,disp.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)