diff mbox series

arm64: dts: imx8mp: add wdog2/3 nodes

Message ID 1615030121-23439-1-git-send-email-peng.fan@oss.nxp.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp: add wdog2/3 nodes | expand

Commit Message

Peng Fan (OSS) March 6, 2021, 11:28 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

There is wdog[2,3] in i.MX8MP, so add them, all wdogs share the
same clock root, so use the wdog1 clk here.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Fabio Estevam March 6, 2021, 12:46 p.m. UTC | #1 
Hi Peng,

On Sat, Mar 6, 2021 at 8:41 AM <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> There is wdog[2,3] in i.MX8MP, so add them, all wdogs share the
> same clock root, so use the wdog1 clk here.

The patch looks good, but I don't understand this sentence where you
state that "all wdogs share the same clock root, so use the wdog1 clk
here."

wdog1 uses IMX8MP_CLK_WDOG1_ROOT
wdog2 uses IMX8MP_CLK_WDOG2_ROOT
wdog3 uses IMX8MP_CLK_WDOG3_ROOT

Please clarify.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c7523fd4eae9..05dd04116f2e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -312,6 +312,22 @@  wdog1: watchdog@30280000 {
 				status = "disabled";
 			};
 
+			wdog2: watchdog@30290000 {
+				compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
+				reg = <0x30290000 0x10000>;
+				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MP_CLK_WDOG2_ROOT>;
+				status = "disabled";
+			};
+
+			wdog3: watchdog@302a0000 {
+				compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
+				reg = <0x302a0000 0x10000>;
+				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MP_CLK_WDOG3_ROOT>;
+				status = "disabled";
+			};
+
 			iomuxc: pinctrl@30330000 {
 				compatible = "fsl,imx8mp-iomuxc";
 				reg = <0x30330000 0x10000>;