From patchwork Wed Mar 10 10:56:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongqiang Niu X-Patchwork-Id: 12127789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3F74C433DB for ; Wed, 10 Mar 2021 10:59:22 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 411D764FE1 for ; Wed, 10 Mar 2021 10:59:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 411D764FE1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Uj8MrvPyvws1LQz14/6DtjJw1RENzAl8F+JGPmuXxY0=; b=b1TW2kwbMypAo+G5iZHHWNkmp 4qwQjknqwRevzhGyr0BRJeeHnFQY8wbIsfLWlrVwCFoTNdgzdAXM+3xkSVOgQlzwfetgVFt2jtZeu vPeodUia4VRgkr0MJIdS+JE1tt04bCLsl6QsE1PbfZskZQHKWilaOYKqWfh6nY8Jnae2Mmh+Qk7jf ciLZOdA00Wd7TPSAsYI5j2Ke6ouy/BQgXvvLsnafd0B69bsP2+A8BJyO5UeaDxSeXHbIOqA4803pF ldjBv3ROZZ9Ec46rwA0IDESa1SiQFoSvCsxgaNR7KAmjAQn5Wiw/QUenfaDb8Mrk/eJBMQB3NeezI Me+qZp12Q==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJwXK-006f34-HJ; Wed, 10 Mar 2021 10:57:54 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lJwWp-006eng-5y; Wed, 10 Mar 2021 10:57:25 +0000 X-UUID: 9cd6f83b063d423a83c096e2dfd51749-20210310 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=S+l9Syh5anQ61b/cqNIeHuv1FsKfcBXeo1Xcd5DpG0w=; b=VAK5KGGG0JahSqCGgz8+wJBdGcVh1RttmhMcTadmeLfBHKFtKEHzS7pbUwaF1akhrqMdEmhQaPs0cafOWrPfGx4TBUQvR5M1r7u+Ti74LfNpP02E7J0ue1tNN+lE+pKXjqcXt8hlC4BfY6Y1uzltOlI/xUncNL00RvoJ7HR8T2c=; X-UUID: 9cd6f83b063d423a83c096e2dfd51749-20210310 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1937963532; Wed, 10 Mar 2021 02:57:02 -0800 Received: from mtkmbs05n1.mediatek.inc (172.21.101.15) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 10 Mar 2021 02:57:01 -0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 10 Mar 2021 18:57:01 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 10 Mar 2021 18:57:00 +0800 From: Yongqiang Niu To: Rob Herring , Matthias Brugger , CK Hu CC: Jassi Brar , Bibby Hsieh , Yongqiang Niu , Dennis YC Hsieh , , , , , Subject: [RESEND PATCH v1 2/2] Revert "mailbox: mediatek: remove implementation related to atomic_exec" Date: Wed, 10 Mar 2021 18:56:52 +0800 Message-ID: <1615373812-16204-3-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1615373812-16204-1-git-send-email-yongqiang.niu@mediatek.com> References: <1615373812-16204-1-git-send-email-yongqiang.niu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210310_105723_660135_DC13E217 X-CRM114-Status: GOOD ( 20.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This reverts commit c9ea564f3d9dd20d88bd34f40a6ff6d31a0d7e8c. Signed-off-by: Yongqiang Niu --- drivers/mailbox/mtk-cmdq-mailbox.c | 80 +++++++++++++++++++++++++++++++++----- 1 file changed, 71 insertions(+), 9 deletions(-) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 5665b6e..e0d9a86 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -56,6 +56,7 @@ struct cmdq_thread { void __iomem *base; struct list_head task_busy_list; u32 priority; + bool atomic_exec; }; struct cmdq_task { @@ -168,18 +169,56 @@ static void cmdq_task_insert_into_thread(struct cmdq_task *task) dma_sync_single_for_cpu(dev, prev_task->pa_base, prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE); prev_task_base[CMDQ_NUM_CMD(prev_task->pkt) - 1] = - (u64)CMDQ_JUMP_BY_PA << 32 | task->pa_base; + (u64)CMDQ_JUMP_BY_PA << 32 | + (task->pa_base >> task->cmdq->shift_pa); dma_sync_single_for_device(dev, prev_task->pa_base, prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE); cmdq_thread_invalidate_fetched_data(thread); } +static bool cmdq_command_is_wfe(u64 cmd) +{ + u64 wfe_option = CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE; + u64 wfe_op = (u64)(CMDQ_CODE_WFE << CMDQ_OP_CODE_SHIFT) << 32; + u64 wfe_mask = (u64)CMDQ_OP_CODE_MASK << 32 | 0xffffffff; + + return ((cmd & wfe_mask) == (wfe_op | wfe_option)); +} + +/* we assume tasks in the same display GCE thread are waiting the same event. */ +static void cmdq_task_remove_wfe(struct cmdq_task *task) +{ + struct device *dev = task->cmdq->mbox.dev; + u64 *base = task->pkt->va_base; + int i; + + dma_sync_single_for_cpu(dev, task->pa_base, task->pkt->cmd_buf_size, + DMA_TO_DEVICE); + for (i = 0; i < CMDQ_NUM_CMD(task->pkt); i++) + if (cmdq_command_is_wfe(base[i])) + base[i] = (u64)CMDQ_JUMP_BY_OFFSET << 32 | + (CMDQ_JUMP_PASS >> task->cmdq->shift_pa); + dma_sync_single_for_device(dev, task->pa_base, task->pkt->cmd_buf_size, + DMA_TO_DEVICE); +} + static bool cmdq_thread_is_in_wfe(struct cmdq_thread *thread) { return readl(thread->base + CMDQ_THR_WAIT_TOKEN) & CMDQ_THR_IS_WAITING; } +static void cmdq_thread_wait_end(struct cmdq_thread *thread, + unsigned long end_pa) +{ + struct device *dev = thread->chan->mbox->dev; + unsigned long curr_pa; + + if (readl_poll_timeout_atomic(thread->base + CMDQ_THR_CURR_ADDR, + curr_pa, curr_pa == end_pa, 1, 20)) + dev_err(dev, "GCE thread cannot run to end.\n"); +} + static void cmdq_task_exec_done(struct cmdq_task *task, enum cmdq_cb_status sta) { struct cmdq_task_cb *cb = &task->pkt->async_cb; @@ -371,15 +410,37 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) cmdq->shift_pa; end_pa = readl(thread->base + CMDQ_THR_END_ADDR) << cmdq->shift_pa; - /* check boundary */ - if (curr_pa == end_pa - CMDQ_INST_SIZE || - curr_pa == end_pa) { - /* set to this task directly */ - writel(task->pa_base >> cmdq->shift_pa, - thread->base + CMDQ_THR_CURR_ADDR); + + /* + * Atomic execution should remove the following wfe, i.e. only + * wait event at first task, and prevent to pause when running. + */ + if (thread->atomic_exec) { + /* GCE is executing if command is not WFE */ + if (!cmdq_thread_is_in_wfe(thread)) { + cmdq_thread_resume(thread); + cmdq_thread_wait_end(thread, + end_pa >> cmdq->shift_pa); + WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0); + /* set to this task directly */ + writel(task->pa_base >> cmdq->shift_pa, + thread->base + CMDQ_THR_CURR_ADDR); + } else { + cmdq_task_insert_into_thread(task); + cmdq_task_remove_wfe(task); + smp_mb(); /* modify jump before enable thread */ + } } else { - cmdq_task_insert_into_thread(task); - smp_mb(); /* modify jump before enable thread */ + /* check boundary */ + if (curr_pa == end_pa - CMDQ_INST_SIZE || + curr_pa == end_pa) { + /* set to this task directly */ + writel(task->pa_base >> cmdq->shift_pa, + thread->base + CMDQ_THR_CURR_ADDR); + } else { + cmdq_task_insert_into_thread(task); + smp_mb(); /* modify jump before enable thread */ + } } writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa, thread->base + CMDQ_THR_END_ADDR); @@ -500,6 +561,7 @@ static struct mbox_chan *cmdq_xlate(struct mbox_controller *mbox, thread = (struct cmdq_thread *)mbox->chans[ind].con_priv; thread->priority = sp->args[1]; + thread->atomic_exec = (sp->args[2] != 0); thread->chan = &mbox->chans[ind]; return &mbox->chans[ind];