Message ID | 1678181001-2327-3-git-send-email-parth.gajjar@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DS1PEPF0000E645.mail.protection.outlook.com (10.167.17.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6178.13 via Frontend Transport; Tue, 7 Mar 2023 09:24:09 +0000 Received: from SATLEXMB08.amd.com (10.181.40.132) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 7 Mar 2023 03:24:07 -0600 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 7 Mar 2023 01:24:06 -0800 Received: from xsjvarunkum50.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Tue, 7 Mar 2023 03:24:05 -0600 From: Parth Gajjar <parth.gajjar@amd.com> To: <robh@kernel.org>, <mripard@kernel.org>, <heiko@sntech.de> CC: <git-dev@xilinx.com>, <michal.simek@amd.com>, <varunkumar.allagadapa@amd.com>, <vishal.sagar@amd.com>, <robh+dt@kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Parth Gajjar <parth.gajjar@amd.com> Subject: [RESENT PATCH 2/2] dt-bindings: gpu: mali-utgard: Add xlnx,zynqmp-mali compatible Date: Tue, 7 Mar 2023 01:23:21 -0800 Message-ID: <1678181001-2327-3-git-send-email-parth.gajjar@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1678181001-2327-1-git-send-email-parth.gajjar@amd.com> References: <1678181001-2327-1-git-send-email-parth.gajjar@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000E645:EE_|SJ2PR12MB7943:EE_ X-MS-Office365-Filtering-Correlation-Id: a2f8bc12-eb7d-400d-b274-08db1eedb4df X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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arm64: zynqmp: Update MALI 400 interrupt and clock names
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On Tue, 07 Mar 2023 01:23:21 -0800, Parth Gajjar wrote: > Xilinx zynqmp SoC contains Mali400, so add its specific compatible to > bindings. > > Signed-off-by: Parth Gajjar <parth.gajjar@amd.com> > Signed-off-by: Vishal Sagar <vishal.sagar@amd.com> > --- > Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index 318122d95eb5..0fae1ef013be 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -33,6 +33,7 @@ properties: - rockchip,rk3228-mali - samsung,exynos4210-mali - stericsson,db8500-mali + - xlnx,zynqmp-mali - const: arm,mali-400 - items: - enum: