From patchwork Mon May 6 03:49:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13654883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7397EC4345F for ; Mon, 6 May 2024 04:08:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3TLwJkmKKWUdAAkFuuWyWM4ptnzWJMpRCxEaSLt8e1U=; b=ql/HQhv5otGEc0 WRrZpQu9hK8J3Kg83qGQLmcKCKvhqVOn4EttBLKivxyqTi3PzzudaQ8/UitDXxvH8stgVxgrGOg/+ /M217ZSA50j2QTFCn9zXVq8yt/8KHuhI8aa6yKdQpD2NDHmm2LZTOTWcr82ZYtITCV8p8GiClYCcd iQJVJ2dGbTsFj56qz9aHskv9vjeP1DhFb0f6RqgbWw6SQGcRQA5k98TVvlug6qjcHgRiRcJ32fxzZ 2n+5oZ+sS2PZS8EdbZpHOoHgOkhL9bpoJYC/J6LE7QC6jKrzC7nN0L9+hdKSzivfsYgA4QwfiWhgj yG4h1mFpsu8nGU4rk1nQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s3peK-00000005yml-2kny; Mon, 06 May 2024 04:08:24 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s3peG-00000005ykz-10EA for linux-arm-kernel@lists.infradead.org; Mon, 06 May 2024 04:08:21 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 05FDB200444; Mon, 6 May 2024 06:08:19 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6B81B20032E; Mon, 6 May 2024 06:08:18 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 29905181D0FD; Mon, 6 May 2024 12:08:16 +0800 (+08) From: Shengjiu Wang To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de, imx@lists.linux.dev, shengjiu.wang@gmail.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/4] clk: imx: clk-audiomix: Add reset controller Date: Mon, 6 May 2024 11:49:17 +0800 Message-Id: <1714967359-27905-3-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> References: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240505_210820_567273_160FF9CC X-CRM114-Status: GOOD ( 15.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Audiomix block control can be a reset controller for Enhanced Audio Return Channel (eARC). The eARC PHY software reset and eARC controller software reset can be supported. Signed-off-by: Shengjiu Wang --- drivers/clk/imx/clk-imx8mp-audiomix.c | 82 +++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c index ae2c0f254225..58630b521e67 100644 --- a/drivers/clk/imx/clk-imx8mp-audiomix.c +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -36,6 +37,8 @@ #define SAI_PLL_MNIT_CTL 0x410 #define IPG_LP_CTRL 0x504 +#define EARC_RESET_MASK 0x3 + #define SAIn_MCLK1_PARENT(n) \ static const struct clk_parent_data \ clk_imx8mp_audiomix_sai##n##_mclk1_parents[] = { \ @@ -213,6 +216,7 @@ static const u16 audiomix_regs[] = { struct clk_imx8mp_audiomix_priv { void __iomem *base; u32 regs_save[ARRAY_SIZE(audiomix_regs)]; + struct reset_controller_dev rcdev; /* Must be last */ struct clk_hw_onecell_data clk_data; @@ -233,6 +237,80 @@ static void clk_imx8mp_audiomix_save_restore(struct device *dev, bool save) } } +static int clk_imx8mp_audiomix_reset_set(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct clk_imx8mp_audiomix_priv *drvdata = container_of(rcdev, + struct clk_imx8mp_audiomix_priv, rcdev); + unsigned int mask = BIT(id); + u32 reg; + + pm_runtime_get_sync(rcdev->dev); + + /* bit = 0 reset, bit = 1 unreset */ + reg = readl(drvdata->base + EARC); + if (assert) + writel(reg & ~mask, drvdata->base + EARC); + else + writel(reg | mask, drvdata->base + EARC); + + pm_runtime_put_sync(rcdev->dev); + + return 0; +} + +static int clk_imx8mp_audiomix_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + clk_imx8mp_audiomix_reset_set(rcdev, id, true); + + return clk_imx8mp_audiomix_reset_set(rcdev, id, false); +} + +static int clk_imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return clk_imx8mp_audiomix_reset_set(rcdev, id, true); +} + +static int clk_imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return clk_imx8mp_audiomix_reset_set(rcdev, id, false); +} + +static int clk_imx8mp_audiomix_reset_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + unsigned long id = reset_spec->args[0]; + + if (!(BIT(id) & EARC_RESET_MASK)) + return -EINVAL; + + return id; +} + +static const struct reset_control_ops clk_imx8mp_audiomix_reset_ops = { + .reset = clk_imx8mp_audiomix_reset_reset, + .assert = clk_imx8mp_audiomix_reset_assert, + .deassert = clk_imx8mp_audiomix_reset_deassert, +}; + +static int clk_imx8mp_audiomix_register_reset_controller(struct device *dev) +{ + struct clk_imx8mp_audiomix_priv *drvdata = dev_get_drvdata(dev); + + drvdata->rcdev.owner = THIS_MODULE; + drvdata->rcdev.nr_resets = fls(EARC_RESET_MASK); + drvdata->rcdev.ops = &clk_imx8mp_audiomix_reset_ops; + drvdata->rcdev.of_node = dev->of_node; + drvdata->rcdev.dev = dev; + drvdata->rcdev.of_reset_n_cells = 1; + drvdata->rcdev.of_xlate = clk_imx8mp_audiomix_reset_xlate; + + return devm_reset_controller_register(dev, &drvdata->rcdev); +} + static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) { struct clk_imx8mp_audiomix_priv *priv; @@ -338,6 +416,10 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) if (ret) goto err_clk_register; + ret = clk_imx8mp_audiomix_register_reset_controller(dev); + if (ret) + goto err_clk_register; + pm_runtime_put_sync(dev); return 0;