From patchwork Tue Mar 6 13:55:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10261771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 56E386037E for ; Tue, 6 Mar 2018 14:00:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3BE3B28FF5 for ; Tue, 6 Mar 2018 14:00:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3921228FF2; Tue, 6 Mar 2018 14:00:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 71FDE28FF5 for ; Tue, 6 Mar 2018 14:00:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=wJO4K1FK/8rhtj03TTz7zzZzyLD75mjepXKQGGQK61k=; b=U6E+EJBeNXe2kxGgcOEnyZNhMh vyy+gHgICpuQTqDU9yUNiBo/Plcn/YHQ4qfWUekAsji9dv/XFmzN4pX5+LCfe9k8I+87bDcl79bUh VPoAX/OOy4+ghiZxJNHffjmeltEs4mAqvKiRvC5tbpNVe81zPYmaIgzFXrHxQcfu2OxGR09umLqA0 PphsZeu449P6wcFVk17nMKdnIiz1NMibShASKqvWMwvMZMdVNkaKNMg5ANvR4r/smgx91QcSgSLcu yijapHU6Rq7xzs5cmBaLdQyQV6EGQTZn6+0EPFcNeYoRGB6MIJerS9tSqeu1z7UcLoOu2P8b9eN6y odTXZoTw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1etD8a-0004Ok-JJ; Tue, 06 Mar 2018 14:00:16 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1etD5n-0002Ed-4J for linux-arm-kernel@lists.infradead.org; Tue, 06 Mar 2018 13:57:47 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 513F9209E0; Tue, 6 Mar 2018 14:57:13 +0100 (CET) Received: from localhost (unknown [185.94.189.190]) by mail.bootlin.com (Postfix) with ESMTPSA id 3CD47209F6; Tue, 6 Mar 2018 14:56:28 +0100 (CET) From: Maxime Ripard To: Thierry Reding , Chen-Yu Tsai , Maxime Ripard , Mark Rutland , Rob Herring Subject: [PATCH v3 1/7] drm/sun4i: tcon: Add TRI finish interrupt for vblank Date: Tue, 6 Mar 2018 14:55:58 +0100 Message-Id: <1903b01ae43dafc43a8d3cfb325ac1db6aed60f4.1520344489.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180306_055724_433006_C4E6AC04 X-CRM114-Status: GOOD ( 11.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Gustavo Padovan , Maarten Lankhorst , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sean Paul , Thomas Petazzoni , Daniel Vetter , Maxime Ripard , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Maxime Ripard The "CPU" (or Intel 8080) interface uses a different interrupt called TRI_FINISH (most likely TRI being for trigger) to notify the end of frames, and hence the VBLANK period. And that interrupt to the possible VBLANK interrupts source. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 9 ++++++--- drivers/gpu/drm/sun4i/sun4i_tcon.h | 4 ++++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index b3960118deb9..7e5134bfb028 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -196,7 +196,8 @@ void sun4i_tcon_enable_vblank(struct sun4i_tcon *tcon, bool enable) DRM_DEBUG_DRIVER("%sabling VBLANK interrupt\n", enable ? "En" : "Dis"); mask = SUN4I_TCON_GINT0_VBLANK_ENABLE(0) | - SUN4I_TCON_GINT0_VBLANK_ENABLE(1); + SUN4I_TCON_GINT0_VBLANK_ENABLE(1) | + SUN4I_TCON_GINT0_TCON0_TRI_FINISH_ENABLE; if (enable) val = mask; @@ -548,7 +549,8 @@ static irqreturn_t sun4i_tcon_handler(int irq, void *private) regmap_read(tcon->regs, SUN4I_TCON_GINT0_REG, &status); if (!(status & (SUN4I_TCON_GINT0_VBLANK_INT(0) | - SUN4I_TCON_GINT0_VBLANK_INT(1)))) + SUN4I_TCON_GINT0_VBLANK_INT(1) | + SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT))) return IRQ_NONE; drm_crtc_handle_vblank(&scrtc->crtc); @@ -557,7 +559,8 @@ static irqreturn_t sun4i_tcon_handler(int irq, void *private) /* Acknowledge the interrupt */ regmap_update_bits(tcon->regs, SUN4I_TCON_GINT0_REG, SUN4I_TCON_GINT0_VBLANK_INT(0) | - SUN4I_TCON_GINT0_VBLANK_INT(1), + SUN4I_TCON_GINT0_VBLANK_INT(1) | + SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT, 0); return IRQ_HANDLED; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index b761c7b823c5..067183076807 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -28,7 +28,11 @@ #define SUN4I_TCON_GINT0_REG 0x4 #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe)) +#define SUN4I_TCON_GINT0_TCON0_TRI_FINISH_ENABLE BIT(27) +#define SUN4I_TCON_GINT0_TCON0_TRI_COUNTER_ENABLE BIT(26) #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe)) +#define SUN4I_TCON_GINT0_TCON0_TRI_FINISH_INT BIT(11) +#define SUN4I_TCON_GINT0_TCON0_TRI_COUNTER_INT BIT(10) #define SUN4I_TCON_GINT1_REG 0x8 #define SUN4I_TCON_FRM_CTL_REG 0x10