From patchwork Thu Jun 22 09:23:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13288854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DFDF1EB64D8 for ; Thu, 22 Jun 2023 09:23:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BqRYp0YX9z1iQ3Dc/0fiIl91RIOSbCwGmbkDA0a77Ys=; b=sa/rZ5WOFUB0Ue atQeG+yNTRisNan3up5DUAh4pv9fEKyQrMKMaC8PJuovbggqKhimrp+jgKk6n5k3ZL8Rqytn5F+/3 Qmp45dxgd+sDz2KloWcQk8/hnflgvPu3e/LRyRyR2MO+lOpy5z46lzyKItwSfwO4EyueutfnnxOoH ZnQPJHWukyvwh35JrcIwMdZzmo98F8UZ4RreUgGZ66CqDFoqM5nhoBsEAKpduFv7RQQqQRD6abTJ8 Jqza+gjElyGCLnSg1uQQQHjqNkJBtOvkTJqrIHhyIFHSFbmsqLOzD4vu3obUA5mlM1XmKdmkB/Sbe iOQSPui1b8kC2MXFuyuQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qCGXH-00HZuU-1W; Thu, 22 Jun 2023 09:23:27 +0000 Received: from michel.telenet-ops.be ([2a02:1800:110:4::f00:18]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qCGXE-00HZpn-07 for linux-arm-kernel@lists.infradead.org; Thu, 22 Jun 2023 09:23:26 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:991a:a831:ea4b:6058]) by michel.telenet-ops.be with bizsmtp id C9PJ2A0091yfRTD069PJK6; Thu, 22 Jun 2023 11:23:19 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1qCGX6-000Bya-F8; Thu, 22 Jun 2023 11:23:18 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1qCGX8-003Vzk-1x; Thu, 22 Jun 2023 11:23:18 +0200 From: Geert Uytterhoeven To: Magnus Damm , Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 1/2] ARM: dts: r8a7740: Add LCDC nodes Date: Thu, 22 Jun 2023 11:23:14 +0200 Message-Id: <1994a9c58321667733d7cd7500d7e25d30308498.1687417585.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230622_022324_231198_DBFF932B X-CRM114-Status: GOOD ( 12.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device nodes for the two LCD Controllers (LCDC) on the R-Mobile A1 SoC, and for the two optional external LCDL clock inputs. Note that the HDMI clock for LCDC1 is not added, as this clock is not yet supported. Based on a patch by Laurent Pinchart adding the first LCDC device node. Signed-off-by: Geert Uytterhoeven --- Changes compared to Laurent's original: - Add lcdc0 label, - Rename node from display to lcdc-controller, - Rename compatible value from "renesas,lcdc-r8a7740" to "renesas,r8a7740-lcdc", - Correct syntax of reg property, - Use GIC_SPI macro, - Add more clocks, - Add power-domains property, - Add status disabled, - Remove second port from lcdc0, as only lcdc1 has an HDMI port, - Add lcdc1 device node. --- arch/arm/boot/dts/r8a7740.dtsi | 65 ++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 1b2cf5fa322b2985..55884ec701f8dab4 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -398,6 +398,61 @@ sh_fsi2: sound@fe1f0000 { status = "disabled"; }; + lcdc0: lcd-controller@fe940000 { + compatible = "renesas,r8a7740-lcdc"; + reg = <0xfe940000 0x4000>; + interrupts = ; + clocks = <&mstp1_clks R8A7740_CLK_LCDC0>, + <&cpg_clocks R8A7740_CLK_M3>, <&lcdlclk0_clk>, + <&vou_clk>; + clock-names = "fck", "media", "lclk", "video"; + power-domains = <&pd_a4lc>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lcdc0_rgb: endpoint { + }; + }; + }; + }; + + lcdc1: lcd-controller@fe944000 { + compatible = "renesas,r8a7740-lcdc"; + reg = <0xfe944000 0x4000>; + interrupts = ; + clocks = <&mstp1_clks R8A7740_CLK_LCDC1>, + <&cpg_clocks R8A7740_CLK_M3>, <&lcdlclk1_clk>, + <&vou_clk>; + clock-names = "fck", "media", "lclk", "video"; + power-domains = <&pd_a4lc>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lcdc1_rgb: endpoint { + }; + }; + + port@1 { + reg = <1>; + + lcdc1_hdmi: endpoint { + }; + }; + }; + }; + tmu0: timer@fff80000 { compatible = "renesas,tmu-r8a7740", "renesas,tmu"; reg = <0xfff80000 0x2c>; @@ -474,6 +529,16 @@ fsibck_clk: fsibck { #clock-cells = <0>; clock-frequency = <0>; }; + lcdlclk0_clk: lcdlclk0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + lcdlclk1_clk: lcdlclk1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 {