@@ -1,13 +1,30 @@
/*
- * arch/arm/mach-prima2/include/mach/clkdev.h
+ * arch/arm/mach-zynq/include/mach/clkdev.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*
- * Licensed under GPLv2 or later.
*/
-#ifndef __MACH_CLKDEV_H
-#define __MACH_CLKDEV_H
+#ifndef __MACH_CLKDEV_H__
+#define __MACH_CLKDEV_H__
+
+#include <plat/clock.h>
+
+struct clk {
+ unsigned long rate;
+ const struct clk_ops *ops;
+ const struct icst_params *params;
+ void __iomem *vcoreg;
+};
#define __clk_get(clk) ({ 1; })
#define __clk_put(clk) do { } while (0)
@@ -1,29 +1,36 @@
-/*
- * arch/arm/mach-prima2/include/mach/debug-macro.S
+/* arch/arm/mach-zynq/include/mach/debug-macro.S
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Debugging macro include header
*
- * Licensed under GPLv2 or later.
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#include <mach/hardware.h>
+#include <mach/zynq_soc.h>
#include <mach/uart.h>
- .macro addruart, rp, rv
- ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
- ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
- .endm
-
- .macro senduart,rd,rx
- str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
- .endm
-
- .macro busyuart,rd,rx
- .endm
-
- .macro waituart,rd,rx
-1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
- tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
- beq 1001b
- .endm
-
+ .macro addruart, rp, rv
+ ldr \rp, =LL_UART_PADDR @ physical
+ ldr \rv, =LL_UART_VADDR @ virtual
+ .endm
+
+ .macro senduart,rd,rx
+ str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
+ tst \rd, #UART_SR_TXFULL @
+ bne 1002b @ wait if FIFO is full
+ .endm
@@ -1,29 +1,30 @@
/*
- * arch/arm/mach-prima2/include/mach/entry-macro.S
+ * arch/arm/mach-zynq/include/mach/entry-macro.S
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Low-level IRQ helper macros
*
- * Licensed under GPLv2 or later.
+ * Copyright (C) 2011 Xilinx
+ *
+ * based on arch/plat-mxc/include/mach/entry-macro.S
+ *
+ * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#include <mach/hardware.h>
+#include <asm/hardware/entry-macro-gic.S>
-#define SIRFSOC_INT_ID 0x38
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =sirfsoc_intc_base
- ldr \base, [\base]
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \irqnr, [\base, #SIRFSOC_INT_ID] @ Get the highest priority irq
- cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f
- movges \irqnr, #0
- .endm
-
- .macro disable_fiq
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
+ .macro disable_fiq
+ .endm
+ .macro arch_ret_to_user, tmp1, tmp2
+ .endm
@@ -1,15 +1,18 @@
-/*
- * arch/arm/mach-prima2/include/mach/hardware.h
+/* arch/arm/mach-zynq/include/mach/hardware.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#ifndef __MACH_HARDWARE_H__
#define __MACH_HARDWARE_H__
-#include <asm/sizes.h>
-#include <mach/map.h>
-
#endif
@@ -1,16 +1,33 @@
-/*
- * arch/arm/mach-prima2/include/mach/io.h
+/* arch/arm/mach-zynq/include/mach/io.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __MACH_PRIMA2_IO_H
-#define __MACH_PRIMA2_IO_H
+#ifndef __MACH_IO_H__
+#define __MACH_IO_H__
+
+/* Allow IO space to be anywhere in the memory */
+
+#define IO_SPACE_LIMIT 0xffff
-#define IO_SPACE_LIMIT ((resource_size_t)0)
+/* IO address mapping macros, nothing special at this time but required */
+
+#ifdef __ASSEMBLER__
+#define IOMEM(x) (x)
+#else
+#define IOMEM(x) ((void __force __iomem *)(x))
+#endif
-#define __mem_pci(a) (a)
+#define __io(a) __typesafe_io(a)
+#define __mem_pci(a) (a)
#endif
@@ -1,17 +1,21 @@
-/*
- * arch/arm/mach-prima2/include/mach/irqs.h
+/* arch/arm/mach-zynq/include/mach/irqs.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-#define SIRFSOC_INTENAL_IRQ_START 0
-#define SIRFSOC_INTENAL_IRQ_END 59
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
-#define NR_IRQS 220
+#define ARCH_NR_GPIOS 118
+#define NR_IRQS (128 + ARCH_NR_GPIOS)
#endif
@@ -1,16 +0,0 @@
-/*
- * memory & I/O static mapping definitions for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_PRIMA2_MAP_H__
-#define __MACH_PRIMA2_MAP_H__
-
-#include <mach/vmalloc.h>
-
-#define SIRFSOC_VA(x) (VMALLOC_END + ((x) & 0x00FFF000))
-
-#endif
@@ -1,21 +1,22 @@
-/*
- * arch/arm/mach-prima2/include/mach/memory.h
+/* arch/arm/mach-zynq/include/mach/memory.h
*
- * Copyright (c) 2010 â?? 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
+#ifndef __MACH_MEMORY_H__
+#define __MACH_MEMORY_H__
-#define PLAT_PHYS_OFFSET UL(0x00000000)
+#include <asm/sizes.h>
-/*
- * Restrict DMA-able region to workaround silicon limitation.
- * The limitation restricts buffers available for DMA to SD/MMC
- * hardware to be below 256MB
- */
-#define ARM_DMA_ZONE_SIZE (SZ_256M)
+#define PLAT_PHYS_OFFSET UL(0x0)
#endif
@@ -1,21 +1,20 @@
-/*
- * arch/arm/mach-prima2/include/mach/system.h
+/* arch/arm/mach-zynq/include/mach/system.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#ifndef __MACH_SYSTEM_H__
#define __MACH_SYSTEM_H__
-#include <linux/bitops.h>
-#include <mach/hardware.h>
-
-#define SIRFSOC_SYS_RST_BIT BIT(31)
-
-extern void __iomem *sirfsoc_rstc_base;
-
static inline void arch_idle(void)
{
cpu_do_idle();
@@ -23,7 +22,7 @@
static inline void arch_reset(char mode, const char *cmd)
{
- writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
+ /* Add architecture specific reset processing here */
}
#endif
@@ -1,14 +1,23 @@
-/*
- * arch/arm/mach-prima2/include/mach/timex.h
+/* arch/arm/mach-zynq/include/mach/timex.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
#ifndef __MACH_TIMEX_H__
#define __MACH_TIMEX_H__
-#define CLOCK_TICK_RATE 1000000
+/* the following is needed for the system to build but will be removed
+ in the future, the value is not important but won't hurt
+*/
+#define CLOCK_TICK_RATE (100 * HZ)
#endif
@@ -1,23 +1,25 @@
-/*
- * arch/arm/mach-prima2/include/mach/uart.h
+/* arch/arm/mach-zynq/include/mach/uart.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __MACH_PRIMA2_SIRFSOC_UART_H
-#define __MACH_PRIMA2_SIRFSOC_UART_H
-
-/* UART-1: used as serial debug port */
-#define SIRFSOC_UART1_PA_BASE 0xb0060000
-#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000)
-#define SIRFSOC_UART1_SIZE SZ_4K
+#ifndef __MACH_UART_H__
+#define __MACH_UART_H__
-#define SIRFSOC_UART_TXFIFO_STATUS 0x0114
-#define SIRFSOC_UART_TXFIFO_DATA 0x0118
+#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
+#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
+#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
-#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5)
-#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6)
+#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */
+#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
#endif
@@ -1,40 +1,51 @@
-/*
- * arch/arm/mach-prima2/include/mach/uncompress.h
+/* arch/arm/mach-zynq/include/mach/uncompress.h
*
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
+#ifndef __MACH_UNCOMPRESS_H__
+#define __MACH_UNCOMPRESS_H__
#include <linux/io.h>
-#include <mach/hardware.h>
+#include <asm/processor.h>
+#include <mach/zynq_soc.h>
#include <mach/uart.h>
void arch_decomp_setup(void)
{
}
-#define arch_decomp_wdog()
-
-static __inline__ void putc(char c)
+static inline void flush(void)
{
/*
- * during kernel decompression, all mappings are flat:
- * virt_addr == phys_addr
+ * Wait while the FIFO is not empty
*/
- while (__raw_readl(SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS)
- & SIRFSOC_UART1_TXFIFO_FULL)
- barrier();
-
- __raw_writel(c, SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA);
+ while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXEMPTY))
+ cpu_relax();
}
-static inline void flush(void)
+#define arch_decomp_wdog()
+
+static void putc(char ch)
{
+ /*
+ * Wait for room in the FIFO, then write the char into the FIFO
+ */
+ while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
+ UART_SR_TXFULL)
+ cpu_relax();
+
+ __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
}
#endif
-
@@ -1,14 +1,20 @@
-/*
- * arch/arm/ach-prima2/include/mach/vmalloc.h
+/* arch/arm/mach-zynq/include/mach/vmalloc.h
*
- * Copyright (c) 2010 â?? 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ * Copyright (C) 2011 Xilinx
*
- * Licensed under GPLv2 or later.
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*/
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
+#ifndef __MACH_VMALLOC_H__
+#define __MACH_VMALLOC_H__
-#define VMALLOC_END 0xFEC00000
+#define VMALLOC_END 0xE0000000UL
#endif
@@ -0,0 +1,48 @@
+/* arch/arm/mach-zynq/include/mach/zynq_soc.h
+ *
+ * Copyright (C) 2011 Xilinx
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MACH_XILINX_SOC_H__
+#define __MACH_XILINX_SOC_H__
+
+#define PERIPHERAL_CLOCK_RATE 2500000
+
+/* For now, all mappings are flat (physical = virtual)
+ */
+#define UART0_PHYS 0xE0000000
+#define UART0_VIRT UART0_PHYS
+
+#define TTC0_PHYS 0xF8001000
+#define TTC0_VIRT TTC0_PHYS
+
+#define PL310_L2CC_PHYS 0xF8F02000
+#define PL310_L2CC_VIRT PL310_L2CC_PHYS
+
+#define SCU_PERIPH_PHYS 0xF8F00000
+#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS
+
+/* The following are intended for the devices that are mapped early */
+
+#define TTC0_BASE IOMEM(TTC0_VIRT)
+#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
+#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100)
+#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000)
+#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT)
+
+/*
+ * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
+ */
+#define LL_UART_PADDR UART0_PHYS
+#define LL_UART_VADDR UART0_VIRT
+
+#endif