From patchwork Tue Oct 16 01:32:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 1598251 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 555CA3FD9C for ; Tue, 16 Oct 2012 01:36:39 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TNw3c-0008Dm-0p; Tue, 16 Oct 2012 01:34:56 +0000 Received: from utopia.booyaka.com ([74.50.51.50]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TNw3A-00088r-Rs for linux-arm-kernel@lists.infradead.org; Tue, 16 Oct 2012 01:34:32 +0000 Received: (qmail 25796 invoked by uid 1019); 16 Oct 2012 01:34:27 -0000 MBOX-Line: From nobody Mon Oct 15 19:32:11 2012 Subject: [PATCH 3/7] ARM: OMAP1: create read_reset_sources() function (for initial use by watchdog) To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org From: Paul Walmsley Date: Mon, 15 Oct 2012 19:32:11 -0600 Message-ID: <20121016013210.21844.77150.stgit@dusk.lan> In-Reply-To: <20121016012448.21844.92339.stgit@dusk.lan> References: <20121016012448.21844.92339.stgit@dusk.lan> User-Agent: StGit/0.16-37-g27ac3 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On OMAP1, the existing OMAP watchdog driver reads a register directly from a non-watchdog IP block. It also does not convert the register's contents into the standard WDIOF_* bits expected from the GETBOOTSTATUS ioctl(). To move towards fixing these problems, create an function in arch/arm/mach-omap1 to return the reset source data. A subsequent patch will provide this function to the watchdog driver via platform_data. In the long term, the best approach would be to move this function to a new OMAP1 driver that handles access to the OMAP1 Clock Generation and Reset Management IP block. Then no platform_data would be needed. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap1/common.h | 2 ++ arch/arm/mach-omap1/reset.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index c2552b2..e83fd70 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -90,4 +90,6 @@ extern int ocpi_enable(void); static inline int ocpi_enable(void) { return 0; } #endif +extern u32 omap1_read_reset_sources(void); + #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index b177091..3e894fb 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -8,8 +8,22 @@ #include +#include "iomap.h" #include "common.h" +/* ARM_SYSST bit shifts related to SoC reset sources */ +#define ARM_SYSST_POR_SHIFT 5 +#define ARM_SYSST_EXT_RST_SHIFT 4 +#define ARM_SYSST_ARM_WDRST_SHIFT 2 +#define ARM_SYSST_GLOB_SWRST_SHIFT 1 + +/* Standardized reset source bits (across all OMAP SoCs) */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 + + void omap1_restart(char mode, const char *cmd) { /* @@ -23,3 +37,28 @@ void omap1_restart(char mode, const char *cmd) omap_writew(1, ARM_RSTCT1); } + +/** + * omap1_read_reset_sources - return the source of the SoC's last reset + * + * Returns bits that represent the last reset source for the SoC. The + * format is standardized across OMAPs for use by the OMAP watchdog. + */ +u32 omap1_read_reset_sources(void) +{ + int ret = 0; + u16 rs; + + rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); + + if (rs & (1 << ARM_SYSST_POR_SHIFT)) + ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT)) + ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT)) + ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT)) + ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT; + + return ret; +}