From patchwork Tue Oct 23 19:09:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 1632181 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id E108BDF283 for ; Tue, 23 Oct 2012 19:16:59 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQjwt-0005pJ-L2; Tue, 23 Oct 2012 19:15:35 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQjwp-0005oW-Te for linux-arm-kernel@lists.infradead.org; Tue, 23 Oct 2012 19:15:33 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9NJFQin012755; Tue, 23 Oct 2012 14:15:26 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9NJEudf013946; Tue, 23 Oct 2012 14:14:56 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Tue, 23 Oct 2012 14:14:55 -0500 Received: from localhost (h64-13.vpn.ti.com [172.24.64.13]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9NJEtAQ004919; Tue, 23 Oct 2012 14:14:55 -0500 Date: Tue, 23 Oct 2012 22:09:14 +0300 From: Felipe Balbi To: Kevin Hilman Subject: Re: [PATCH] gpio/omap: fix off-mode bug: clear debounce clock enable mask on disable Message-ID: <20121023190914.GA853@arwen.pp.htv.fi> References: <1351015771-6308-1-git-send-email-khilman@deeprootsystems.com> MIME-Version: 1.0 In-Reply-To: <1351015771-6308-1-git-send-email-khilman@deeprootsystems.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Paul Walmsley , Linus Walleij , Felipe Balbi , Igor Grinberg , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: balbi@ti.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi, On Tue, Oct 23, 2012 at 11:09:31AM -0700, Kevin Hilman wrote: > From: Kevin Hilman > > When debounce clocks are disabled, ensure that the banks > dbck_enable_mask is cleared also. Otherwise, context restore on > subsequent off-mode transition will restore previous value from the > shadow copies (bank->context.debounce*) leading to mismatch state > between driver state and hardware state. > > This was discovered when board code was doing > > gpio_request_one() > gpio_set_debounce() > gpio_free() > > which was leaving the GPIO debounce settings in a confused state. > Then, enabling off mode causing bogus state to be restored, leaving > GPIO debounce enabled which then prevented the CORE powerdomain from > transitioning. > > Reported-by: Paul Walmsley > Cc: Igor Grinberg > Signed-off-by: Kevin Hilman looks like this deserves a Cc: stable@vger.kernel.org tag. > --- > Applies on v3.7-rc2, targetted for v3.7. > > drivers/gpio/gpio-omap.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c > index 94cbc84..dee2856 100644 > --- a/drivers/gpio/gpio-omap.c > +++ b/drivers/gpio/gpio-omap.c > @@ -187,6 +187,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank) > * to detect events and generate interrupts at least on OMAP3. > */ > __raw_writel(0, bank->base + bank->regs->debounce_en); > + bank->dbck_enable_mask = 0; shouldn't omap_gpio_restore_context() check for dbck_enabled instead of the mask ? I mean: the outcome would be the same, so it doesn't really matter. Just that, at least to me, it would look better. No strong feelings though. Acked-by: Felipe Balbi diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 94cbc84..b3a39a7 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1371,7 +1371,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) bank->base + bank->regs->dataout); __raw_writel(bank->context.oe, bank->base + bank->regs->direction); - if (bank->dbck_enable_mask) { + if (bank->dbck_enabled) { __raw_writel(bank->context.debounce, bank->base + bank->regs->debounce); __raw_writel(bank->context.debounce_en,