From patchwork Wed Oct 24 00:34:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Cartwright X-Patchwork-Id: 1635211 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 3B8CB3FD85 for ; Wed, 24 Oct 2012 00:35:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQovN-0005dq-2P; Wed, 24 Oct 2012 00:34:21 +0000 Received: from bombadil.infradead.org ([2001:4830:2446:ff00:4687:fcff:fea6:5117]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQovL-0005dV-CK for linux-arm-kernel@merlin.infradead.org; Wed, 24 Oct 2012 00:34:19 +0000 Received: from mailserver5.natinst.com ([130.164.80.5] helo=spamkiller05.natinst.com) by bombadil.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQovJ-000385-2i for linux-arm-kernel@lists.infradead.org; Wed, 24 Oct 2012 00:34:18 +0000 Received: from mailserv58-us.natinst.com (nb-hsrp-1338.natinst.com [130.164.19.133]) by spamkiller05.natinst.com (8.14.5/8.14.5) with ESMTP id q9O0YC4v024835; Tue, 23 Oct 2012 19:34:12 -0500 Received: from beefymiracle.amer.corp.natinst.com ([130.164.14.197]) by mailserv58-us.natinst.com (Lotus Domino Release 8.5.3FP2 HF169) with ESMTP id 2012102319341211-577704 ; Tue, 23 Oct 2012 19:34:12 -0500 Received: by beefymiracle.amer.corp.natinst.com (Postfix, from userid 1000) id A9F15600D2; Tue, 23 Oct 2012 19:34:16 -0500 (CDT) Date: Tue, 23 Oct 2012 19:34:16 -0500 From: Josh Cartwright To: arm@kernel.org, Arnd Bergmann Subject: [PATCH v3 2/5] zynq: use pl310 device tree bindings Message-ID: <20121024003416.GC31625@beefymiracle.amer.corp.natinst.com> MIME-Version: 1.0 In-Reply-To: <20121024003218.GA31625@beefymiracle.amer.corp.natinst.com> User-Agent: Mutt/1.5.21 (2011-07-01) X-MIMETrack: Itemize by SMTP Server on MailServ58-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 10/23/2012 07:34:12 PM, Serialize by Router on MailServ58-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 10/23/2012 07:34:12 PM, Serialize complete at 10/23/2012 07:34:12 PM Content-Disposition: inline X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.7.7855, 1.0.431, 0.0.0000 definitions=2012-10-23_09:2012-10-23, 2012-10-23, 1970-01-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121023_203417_458410_3DEB8E83 X-CRM114-Status: GOOD ( 11.34 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Nick Bowler , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, John Linn X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright Cc: John Linn Acked-by: Arnd Bergmann --- arch/arm/boot/dts/zynq-ep107.dts | 9 +++++++++ arch/arm/mach-zynq/common.c | 9 +-------- arch/arm/mach-zynq/include/mach/zynq_soc.h | 4 ---- 3 files changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts index 7bfff4a..87204d7 100644 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ b/arch/arm/boot/dts/zynq-ep107.dts @@ -44,6 +44,15 @@ <0xF8F00100 0x100>; }; + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xF8F02000 0x1000>; + arm,data-latency = <2 3 2>; + arm,tag-latency = <2 3 2>; + cache-unified; + cache-level = <2>; + }; + uart0: uart@e0000000 { compatible = "xlnx,xuartps"; reg = <0xE0000000 0x1000>; diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index d73963b..056091a 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -45,12 +45,10 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = { */ static void __init xilinx_init_machine(void) { -#ifdef CONFIG_CACHE_L2X0 /* * 64KB way size, 8-way associativity, parity disabled */ - l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF); -#endif + l2x0_of_init(0x02060000, 0xF0F0FFFF); of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } @@ -83,11 +81,6 @@ static struct map_desc io_desc[] __initdata = { .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), .length = SZ_8K, .type = MT_DEVICE, - }, { - .virtual = PL310_L2CC_VIRT, - .pfn = __phys_to_pfn(PL310_L2CC_PHYS), - .length = SZ_4K, - .type = MT_DEVICE, }, #ifdef CONFIG_DEBUG_LL diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 3d1c6a6..218283a 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -25,9 +25,6 @@ #define TTC0_PHYS 0xF8001000 #define TTC0_VIRT TTC0_PHYS -#define PL310_L2CC_PHYS 0xF8F02000 -#define PL310_L2CC_VIRT PL310_L2CC_PHYS - #define SCU_PERIPH_PHYS 0xF8F00000 #define SCU_PERIPH_VIRT SCU_PERIPH_PHYS @@ -35,7 +32,6 @@ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT) /* * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical