From patchwork Mon Oct 29 16:56:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Cartwright X-Patchwork-Id: 1664671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 331F33FCF7 for ; Mon, 29 Oct 2012 16:58:53 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSsdj-000452-UN; Mon, 29 Oct 2012 16:56:40 +0000 Received: from mailserver6.natinst.com ([130.164.80.6] helo=spamkiller06.natinst.com) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSsdf-00044o-Rl for linux-arm-kernel@lists.infradead.org; Mon, 29 Oct 2012 16:56:37 +0000 Received: from mailserv59-us.natinst.com (nb-hsrp-1338.natinst.com [130.164.19.133]) by spamkiller06.natinst.com (8.14.5/8.14.5) with ESMTP id q9TGuDIX024816; Mon, 29 Oct 2012 11:56:13 -0500 Received: from beefymiracle.amer.corp.natinst.com ([130.164.14.197]) by mailserv59-us.natinst.com (Lotus Domino Release 8.5.3FP2 HF169) with ESMTP id 2012102911561369-744138 ; Mon, 29 Oct 2012 11:56:13 -0500 Received: by beefymiracle.amer.corp.natinst.com (Postfix, from userid 1000) id 5B1EC66C1E; Mon, 29 Oct 2012 10:56:21 -0600 (CST) Date: Mon, 29 Oct 2012 10:56:21 -0600 From: Josh Cartwright To: Nick Bowler Subject: Re: [PATCH] ARM: zynq: Allow UART1 to be used as DEBUG_LL console. Message-ID: <20121029165621.GF5190@beefymiracle.amer.corp.natinst.com> References: <20121025224108.GA30705@elliptictech.com> <1351205254-2409-1-git-send-email-nbowler@elliptictech.com> MIME-Version: 1.0 In-Reply-To: <1351205254-2409-1-git-send-email-nbowler@elliptictech.com> User-Agent: Mutt/1.5.21 (2011-07-01) X-MIMETrack: Itemize by SMTP Server on MailServ59-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 10/29/2012 11:56:13 AM, Serialize by Router on MailServ59-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 10/29/2012 11:56:13 AM, Serialize complete at 10/29/2012 11:56:13 AM X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.7.7855, 1.0.431, 0.0.0000 definitions=2012-10-29_02:2012-10-29, 2012-10-29, 1970-01-01 signatures=0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Arnd Bergmann , Michal Simek , linux-kernel@vger.kernel.org, arm@kernel.org, John Linn , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Thu, Oct 25, 2012 at 06:47:34PM -0400, Nick Bowler wrote: > The main UART on the Xilinx ZC702 board is UART1, located at address > e0001000. Add a Kconfig option to select this device as the low-level > debugging port. This allows the really early boot printouts to reach > the USB serial adaptor on this board. > > For consistency's sake, add a choice entry for UART0 even though it is > the the default if UART1 is not selected. > > As there are currently known issues related to the UART virtual > mappings, this is KNOWN BROKEN, not to be merged yet! > > Not-Yet-Signed-off-by: Nick Bowler Tested-by: Josh Cartwright Now that v5 of the initial zynq cleanup patchset is queued up for merging (with a workaround for the uart mapping problem), what would it take for you to sign off on this patch? There is some trivial merging that has to be done to get it to apply cleanly on v5. See a rebased version below. Thanks, Josh diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index b0f3857..7754d51 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -132,6 +132,23 @@ choice their output to UART1 serial port on DaVinci TNETV107X devices. + config DEBUG_ZYNQ_UART0 + bool "Kernel low-level debugging on Xilinx Zynq using UART0" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART0 on the Zynq platform. + + config DEBUG_ZYNQ_UART1 + bool "Kernel low-level debugging on Xilinx Zynq using UART1" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART1 on the Zynq platform. + + If you have a ZC702 board and want early boot messages to + appear on the USB serial adaptor, select this option. + config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ba8d14f..93b9105 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -84,9 +84,9 @@ static struct map_desc io_desc[] __initdata = { #ifdef CONFIG_DEBUG_LL { - .virtual = UART0_VIRT, - .pfn = __phys_to_pfn(UART0_PHYS), - .length = UART0_SIZE, + .virtual = LL_UART_VADDR, + .pfn = __phys_to_pfn(LL_UART_PADDR), + .length = UART_SIZE, .type = MT_DEVICE, }, #endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 1b8bf0e..7f4f38b 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -25,8 +25,9 @@ * address that is known to work. */ #define UART0_PHYS 0xE0000000 -#define UART0_SIZE SZ_4K -#define UART0_VIRT 0xF0001000 +#define UART1_PHYS 0xE0001000 +#define UART_SIZE SZ_4K +#define UART_VIRT 0xF0001000 #define TTC0_PHYS 0xF8001000 #define TTC0_SIZE SZ_4K @@ -36,12 +37,17 @@ #define SCU_PERIPH_SIZE SZ_8K #define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) +#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) +# define LL_UART_PADDR UART1_PHYS +# define LL_UART_VADDR UART_VIRT +#else +# define LL_UART_PADDR UART0_PHYS +# define LL_UART_VADDR UART_VIRT +#endif + /* The following are intended for the devices that are mapped early */ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -#define LL_UART_PADDR UART0_PHYS -#define LL_UART_VADDR UART0_VIRT - #endif