From patchwork Mon Jan 28 19:31:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavel Machek X-Patchwork-Id: 2058011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 471F43FD1A for ; Mon, 28 Jan 2013 19:33:41 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TzuQK-0003Fd-Gv; Mon, 28 Jan 2013 19:31:20 +0000 Received: from atrey.karlin.mff.cuni.cz ([195.113.26.193]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TzuQH-0003Ey-3Y for linux-arm-kernel@lists.infradead.org; Mon, 28 Jan 2013 19:31:18 +0000 Received: by atrey.karlin.mff.cuni.cz (Postfix, from userid 512) id 50D9780F57; Mon, 28 Jan 2013 20:31:15 +0100 (CET) Date: Mon, 28 Jan 2013 20:31:13 +0100 From: Pavel Machek To: dinguyen@altera.com Subject: Re: [PATCHv1 for soc 5/5] arm: socfpga: Add SMP support for actual socfpga harware Message-ID: <20130128193113.GA26908@amd.pavel.ucw.cz> References: <1359075633-13502-1-git-send-email-dinguyen@altera.com> <1359075633-13502-6-git-send-email-dinguyen@altera.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1359075633-13502-6-git-send-email-dinguyen@altera.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130128_143117_357719_867D3DCD X-CRM114-Status: GOOD ( 16.17 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [195.113.26.193 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Olof Johansson , linux@arm.linux.org.uk, Arnd Bergmann , linux-arm-kernel@lists.infradead.org, wd@denx.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi! I believe cpu1start_addr should go to the device tree, so that this code is not neccessary. Proposed patch is below... Thanks, Pavel > +static void __init init_socfpga_vt(void) > +{ > + cpu1start_addr = 0xffd08010; > +} > + > +static void __init init_socfpga(void) > +{ > + cpu1start_addr = 0xffd080c4; > +} > + ... > + > + if (of_machine_is_compatible("altr,socfpga-vt")) > + init_socfpga_vt(); > + else > + init_socfpga(); commit b0d651bb4deeb0d8d08969a47b77d3317cbbc0a2 Author: Pavel Date: Mon Jan 28 20:28:06 2013 +0100 Fix whitespace in socfpga.dtsi. Move cpu1-start-addr variable to device tree, so that config code is not neccessary in kernel. Signed-off-by: Pavel Machek diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 688729f..35d4bdc 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -180,13 +180,13 @@ }; rstmgr@ffd05000 { - compatible = "altr,rst-mgr"; - reg = <0xffd05000 0x1000>; - }; + compatible = "altr,rst-mgr"; + reg = <0xffd05000 0x1000>; + }; sysmgr@ffd08000 { - compatible = "altr,sys-mgr"; - reg = <0xffd08000 0x4000>; - }; + compatible = "altr,sys-mgr"; + reg = <0xffd08000 0x4000>; + }; }; }; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts index 1a6d088..e922475 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts @@ -56,5 +56,9 @@ serial1@ffc03000 { clock-frequency = <100000000>; }; + + sysmgr@ffd08000 { + cpu1-start-addr = <0xffd08010>; + }; }; }; diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index df3551f..407ba14 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -56,5 +56,9 @@ serial1@ffc03000 { clock-frequency = <7372800>; }; + + sysmgr@ffd08000 { + cpu1-start-addr = <0xffd08010>; + }; }; }; diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 2d1e8db..bb17810 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -56,16 +56,6 @@ static void __init socfpga_scu_map_io(void) iotable_init(&scu_io_desc, 1); } -static void __init init_socfpga_vt(void) -{ - cpu1start_addr = 0xffd08010; -} - -static void __init init_socfpga(void) -{ - cpu1start_addr = 0xffd080c4; -} - static void __init socfpga_map_io(void) { socfpga_scu_map_io(); @@ -83,6 +73,11 @@ void __init socfpga_sysmgr_init(void) struct device_node *np; np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); + + if (of_property_read_u32(np, "cpu1-start-addr", (u32 *) &cpu1start_addr)) { + early_printk("Need cpu1-start-addr in device tree.\n"); + panic("Need cpu1-start-addr in device tree.\n"); + } sys_manager_base_addr = of_iomap(np, 0); np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); @@ -93,11 +88,6 @@ static void __init gic_init_irq(void) { of_irq_init(irq_match); socfpga_sysmgr_init(); - - if (of_machine_is_compatible("altr,socfpga-vt")) - init_socfpga_vt(); - else - init_socfpga(); } static void socfpga_cyclone5_restart(char mode, const char *cmd)