From patchwork Wed Aug 7 22:55:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2840651 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 11BABBF535 for ; Wed, 7 Aug 2013 22:56:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C6CE2050D for ; Wed, 7 Aug 2013 22:56:16 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 11D622050C for ; Wed, 7 Aug 2013 22:56:15 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7CeB-0003VV-Kh; Wed, 07 Aug 2013 22:56:03 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7Ce4-0000JE-8J; Wed, 07 Aug 2013 22:55:56 +0000 Received: from mail-pb0-x235.google.com ([2607:f8b0:400e:c01::235]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V7Cdy-0000Fg-SQ for linux-arm-kernel@lists.infradead.org; Wed, 07 Aug 2013 22:55:53 +0000 Received: by mail-pb0-f53.google.com with SMTP id up15so2449336pbc.26 for ; Wed, 07 Aug 2013 15:55:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=llIIp91gZaZ21fxGGa5lSXAeK0HfclJ0PllMpDwznlU=; b=hN1I94Gcd590kftsk4Uj/lhYEXikmScBVZ/txZWIGCzRRhq577xZ+mJvNwdlGZBhd/ ZOkkiebTQq3Pt0KnNa78sYesKcnKuyOlRMA7RtzAQElfDvXySjrW3UQRO1rX3mGDwPzU x9TVCvYTIWSQMXtwv3Vd9nwQkQQPEyKCViC/VsZmVN5nDj/vnuQQ9wy7IT2yIQFRRxRp XP9yoaqYAUjN364j/ffgUKqXNKNPUg72tZUX8HHTmyPt6+q5MJYUpGqv2f+GUIMr5e9r k1V2hs02V2kFKD7EkZ56rxDnOxz6FTiVFxpt97RzX9eUR7Tc6vlTUgl/2l/423mUvg61 IwBw== X-Received: by 10.68.241.198 with SMTP id wk6mr2832249pbc.165.1375916129222; Wed, 07 Aug 2013 15:55:29 -0700 (PDT) Received: from [127.0.0.1] (ac230065.ppp.asahi-net.or.jp. [183.77.230.65]) by mx.google.com with ESMTPSA id oj6sm12677862pab.9.2013.08.07.15.55.26 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 07 Aug 2013 15:55:27 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Thu, 08 Aug 2013 07:55:40 +0900 Message-Id: <20130807225540.9856.67383.sendpatchset@w520> In-Reply-To: <20130807225531.9856.18974.sendpatchset@w520> References: <20130807225531.9856.18974.sendpatchset@w520> Subject: [PATCH 01/02] ARM: shmobile: Add r8a73a4 SMP support using APMU code X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130807_185551_105969_C9809265 X-CRM114-Status: GOOD ( 14.69 ) X-Spam-Score: -2.0 (--) Cc: olof@lixom.net, horms@verge.net.au, Magnus Damm , arnd@arndb.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add r8a73a4 SMP support using the shared APMU code. To enable SMP the r8a73a4 specific DTS needs to be updated to include CPU cores, and this is happening in a separate patch. Signed-off-by: Magnus Damm --- arch/arm/mach-shmobile/Makefile | 1 arch/arm/mach-shmobile/include/mach/r8a73a4.h | 1 arch/arm/mach-shmobile/setup-r8a73a4.c | 3 + arch/arm/mach-shmobile/smp-r8a73a4.c | 75 +++++++++++++++++++++++++ 4 files changed, 80 insertions(+) --- 0001/arch/arm/mach-shmobile/Makefile +++ work/arch/arm/mach-shmobile/Makefile 2013-08-07 20:07:31.000000000 +0900 @@ -33,6 +33,7 @@ endif # SMP objects smp-y := platsmp.o headsmp.o smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o +smp-$(CONFIG_ARCH_R8A73A4) += smp-r8a73a4.o platsmp-apmu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o --- 0008/arch/arm/mach-shmobile/include/mach/r8a73a4.h +++ work/arch/arm/mach-shmobile/include/mach/r8a73a4.h 2013-08-07 20:08:02.000000000 +0900 @@ -6,5 +6,6 @@ void r8a73a4_add_dt_devices(void); void r8a73a4_clock_init(void); void r8a73a4_pinmux_init(void); void r8a73a4_init_early(void); +extern struct smp_operations r8a73a4_smp_ops; #endif /* __ASM_R8A73A4_H__ */ --- 0008/arch/arm/mach-shmobile/setup-r8a73a4.c +++ work/arch/arm/mach-shmobile/setup-r8a73a4.c 2013-08-07 20:07:48.000000000 +0900 @@ -212,6 +212,9 @@ void __init r8a73a4_init_early(void) #ifndef CONFIG_ARM_ARCH_TIMER shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */ #endif +#ifdef CONFIG_SMP + smp_set_ops(&r8a73a4_smp_ops); +#endif } #ifdef CONFIG_USE_OF --- /dev/null +++ work/arch/arm/mach-shmobile/smp-r8a73a4.c 2013-08-07 20:09:10.000000000 +0900 @@ -0,0 +1,75 @@ +/* + * SMP support for r8a73a4 + * + * Copyright (C) 2012-2013 Renesas Solutions Corp. + * Copyright (C) 2012 Takashi Yoshii + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include + +#define SYSC 0xe6180000 +#define CA7BAR 0x4020 +#define CA15BAR 0x6020 +#define RESCNT 0x801c +#define MERAM 0xe8080000 +#define CCI_BASE 0xf0190000 +#define CCI_SLAVE3 0x4000 +#define CCI_SLAVE4 0x5000 +#define CCI_SNOOP 0x0000 +#define CCI_STATUS 0x000c + +static void __init r8a73a4_smp_prepare_cpus(unsigned int max_cpus) +{ + u32 bar; + void __iomem *p; + + /* let APMU code install data related to shmobile_boot_vector */ + shmobile_smp_apmu_prepare_cpus(max_cpus); + + /* MERAM for jump stub, because BAR requires 256KB aligned address */ + p = ioremap_nocache(MERAM, shmobile_boot_size); + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); + iounmap(p); + + /* setup reset vector and disable reset */ + p = ioremap_nocache(SYSC, 0x9000); + bar = (MERAM >> 8) & 0xfffffc00; + writel_relaxed(bar, p + CA15BAR); + writel_relaxed(bar, p + CA7BAR); + writel_relaxed(bar | 0x10, p + CA15BAR); + writel_relaxed(bar | 0x10, p + CA7BAR); + writel_relaxed(readl_relaxed(p + RESCNT) & ~(1 << 10), p + RESCNT); + writel_relaxed(readl_relaxed(p + RESCNT) & ~(1 << 9), p + RESCNT); + iounmap(p); + + /* enable snoop and DVM */ + p = ioremap_nocache(CCI_BASE, 0x8000); + writel_relaxed(3, p + CCI_SLAVE3 + CCI_SNOOP); /* CA15 */ + writel_relaxed(3, p + CCI_SLAVE4 + CCI_SNOOP); /* CA7 */ + while (readl_relaxed(p + CCI_STATUS)) + /* wait for pending bit low */; + iounmap(p); +} + +struct smp_operations r8a73a4_smp_ops __initdata = { + .smp_prepare_cpus = r8a73a4_smp_prepare_cpus, + .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_disable = shmobile_smp_cpu_disable, + .cpu_die = shmobile_smp_apmu_cpu_die, + .cpu_kill = shmobile_smp_apmu_cpu_kill, +#endif +};