From patchwork Thu Jan 9 15:24:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 3461651 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E0644C02DC for ; Thu, 9 Jan 2014 15:25:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 703DF20103 for ; Thu, 9 Jan 2014 15:25:26 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D583F200DE for ; Thu, 9 Jan 2014 15:25:24 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1HTz-0005vk-F7; Thu, 09 Jan 2014 15:25:19 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1HTw-0000js-KZ; Thu, 09 Jan 2014 15:25:16 +0000 Received: from pandora.arm.linux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W1HTs-0000ii-B0 for linux-arm-kernel@lists.infradead.org; Thu, 09 Jan 2014 15:25:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=pandora; h=Sender:In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=bhggiRwbZx9XHG/+cYNfO3bVR/MkceG8ZMRTXENhbVk=; b=Hi1kFju73uRRkKlLKitaEk8hh56euMC1wJCXg01nq1wxYBvlBtUt1HiBbdyG3/c/EVQI0zUy7P2O2uD8Todm07+vfg0dU0mBPXZKx0WUDyhizDuhTczB/TIHhblvO4BhV5+hthex73XHrv9caExdiBiZr+e6T0mrUTvwtRw4s0k=; Received: from n2100.arm.linux.org.uk ([fd8f:7570:feb6:1:214:fdff:fe10:4f86]:38376) by pandora.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1W1HTN-0003qg-TS; Thu, 09 Jan 2014 15:24:42 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1W1HTK-0003il-RO; Thu, 09 Jan 2014 15:24:38 +0000 Date: Thu, 9 Jan 2014 15:24:37 +0000 From: Russell King - ARM Linux To: Tony Lindgren Subject: Re: [PATCH RFC 00/26] Migrate more OMAP DMA code to DMA engine Message-ID: <20140109152437.GB27282@n2100.arm.linux.org.uk> References: <20140102150836.GA3826@n2100.arm.linux.org.uk> <20140108012110.GL5074@atomide.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140108012110.GL5074@atomide.com> User-Agent: Mutt/1.5.19 (2009-01-05) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140109_102512_773063_62B717A3 X-CRM114-Status: GOOD ( 21.04 ) X-Spam-Score: -2.0 (--) Cc: dmaengine@vger.kernel.org, Vinod Koul , Dan Williams , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Jan 07, 2014 at 05:21:11PM -0800, Tony Lindgren wrote: > * Russell King - ARM Linux [140102 07:11]: > > The following patch series moves code to setup the DMA hardware and > > service interrupts from the hardware to the DMA engine driver. This > > reduces the dependency on the legacy DMA implementation. > > > > This series does not remove the channel allocation/freeing hooks which > > are used to manage the allocation of physical channels - this is the > > next step in the evolution. > > > > The patches which move the interrupt handling are currently less than > > perfect since they're writing to ENABLE_L0 under a different spinlock, > > and hence RFC only at the moment. > > Nice to see this happening. These seem to work for me based on a quick > try on omap2+, but on omap1 the build fails: > > arch/arm/mach-omap1/dma.c: In function ‘dma_write’: > arch/arm/mach-omap1/dma.c:186: error: ‘const struct omap_dma_reg’ has no member named ‘size’ Right, needs this incremental patch: diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index 3afde9628839..404f89e3eeb8 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -183,7 +183,7 @@ static inline void dma_write(u32 val, int reg, int lch) addr += reg_map[reg].stride * lch; __raw_writew(val, addr); - if (reg_map[reg].size == OMAP_DMA_REG_2X16BIT) + if (reg_map[reg].type == OMAP_DMA_REG_2X16BIT) __raw_writew(val >> 16, addr + 2); } @@ -196,7 +196,7 @@ static inline u32 dma_read(int reg, int lch) addr += reg_map[reg].stride * lch; val = __raw_readw(addr); - if (reg_map[reg].size == OMAP_DMA_REG_2X16BIT) + if (reg_map[reg].type == OMAP_DMA_REG_2X16BIT) val |= __raw_readw(addr + 2) << 16; return val;