From patchwork Sun Jan 12 10:59:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 3471441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 52E489F2E9 for ; Sun, 12 Jan 2014 11:00:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6FD7520103 for ; Sun, 12 Jan 2014 11:00:56 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 162162013A for ; Sun, 12 Jan 2014 11:00:55 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2ImX-0008GB-VR; Sun, 12 Jan 2014 11:00:42 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2ImV-0007cA-KY; Sun, 12 Jan 2014 11:00:39 +0000 Received: from pandora.arm.linux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W2ImR-0007bV-6Z for linux-arm-kernel@lists.infradead.org; Sun, 12 Jan 2014 11:00:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=pandora; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=Zwt4PADdWbD+EScWbgav/+1dN6pF0mEe94Q01P8dZs8=; b=GrzapnG++YS3po+L1nmZICjfuOgCfVWKF20zTtEvefCd1ooyysjEftFCUm5ISt/UvLGnIsdOQtW8wRfQ7VFRO4sr+DlEfx7dgLxmaOh10bhvBhdf5gY09ZNYEcy1TJtHnPW7OgvWkjtgs5j5VybrYnbldRdoXWUHK/hEiotybYg=; Received: from n2100.arm.linux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:4f86]:42135) by pandora.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1W2Ilt-0006v7-5r; Sun, 12 Jan 2014 11:00:01 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1W2Ilr-0002m4-Kg; Sun, 12 Jan 2014 10:59:59 +0000 Date: Sun, 12 Jan 2014 10:59:59 +0000 From: Russell King - ARM Linux To: Santosh Shilimkar Subject: Re: [PATCH] mm: nobootmem: avoid type warning about alignment value Message-ID: <20140112105958.GA9791@n2100.arm.linux.org.uk> References: <1385249326-9089-1-git-send-email-santosh.shilimkar@ti.com> <529217C7.6030304@cogentembedded.com> <52935762.1080409@ti.com> <20131209165044.cf7de2edb8f4205d5ac02ab0@linux-foundation.org> <20131210005454.GX4360@n2100.arm.linux.org.uk> <52A66826.7060204@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <52A66826.7060204@ti.com> User-Agent: Mutt/1.5.19 (2009-01-05) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140112_060036_315317_6F5B4555 X-CRM114-Status: GOOD ( 23.59 ) X-Spam-Score: -2.1 (--) Cc: Sergei Shtylyov , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Tejun Heo , Andrew Morton , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, Dec 09, 2013 at 08:02:30PM -0500, Santosh Shilimkar wrote: > On Monday 09 December 2013 07:54 PM, Russell King - ARM Linux wrote: > > The underlying reason is that - as I've already explained - ARM's __ffs() > > differs from other architectures in that it ends up being an int, whereas > > almost everyone else is unsigned long. > > > > The fix is to fix ARMs __ffs() to conform to other architectures. > > > I was just about to cross-post your reply here. Obviously I didn't think > this far when I made $subject fix. > > So lets ignore the $subject patch which is not correct. Sorry for noise Well, here we are, a month on, and this still remains unfixed despite my comments pointing to what the problem is. So, here's a patch to fix this problem the correct way. I took the time to add some comments to these functions as I find that I wonder about their return values, and these comments make the patch a little larger than it otherwise would be. This patch makes their types match exactly with x86's definitions of the same, which is the basic problem: on ARM, they all took "int" values and returned "int"s, which leads to min() in nobootmem.c complaining. arch/arm/include/asm/bitops.h | 54 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 44 insertions(+), 10 deletions(-) Acked-by: Nicolas Pitre diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index e691ec91e4d3..b2e298a90d76 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -254,25 +254,59 @@ static inline int constant_fls(int x) } /* - * On ARMv5 and above those functions can be implemented around - * the clz instruction for much better code efficiency. + * On ARMv5 and above those functions can be implemented around the + * clz instruction for much better code efficiency. __clz returns + * the number of leading zeros, zero input will return 32, and + * 0x80000000 will return 0. */ +static inline unsigned int __clz(unsigned int x) +{ + unsigned int ret; + + asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); + return ret; +} + +/* + * fls() returns zero if the input is zero, otherwise returns the bit + * position of the last set bit, where the LSB is 1 and MSB is 32. + */ static inline int fls(int x) { - int ret; - if (__builtin_constant_p(x)) return constant_fls(x); - asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); - ret = 32 - ret; - return ret; + return 32 - __clz(x); +} + +/* + * __fls() returns the bit position of the last bit set, where the + * LSB is 0 and MSB is 31. Zero input is undefined. + */ +static inline unsigned long __fls(unsigned long x) +{ + return fls(x) - 1; +} + +/* + * ffs() returns zero if the input was zero, otherwise returns the bit + * position of the first set bit, where the LSB is 1 and MSB is 32. + */ +static inline int ffs(int x) +{ + return fls(x & -x); +} + +/* + * __ffs() returns the bit position of the first bit set, where the + * LSB is 0 and MSB is 31. Zero input is undefined. + */ +static inline unsigned long __ffs(unsigned long x) +{ + return ffs(x) - 1; } -#define __fls(x) (fls(x) - 1) -#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) -#define __ffs(x) (ffs(x) - 1) #define ffz(x) __ffs( ~(x) ) #endif