| Message ID | 20140223212737.099151500@linutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Feb 23, 2014 at 09:40:12PM -0000, Thomas Gleixner wrote: > Use the proper functions. There is no need to fiddle with irq_desc. > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > Cc: Shawn Guo <shawn.guo@linaro.org> ... > arch/arm/mach-imx/pm-imx6q.c | 7 +++---- Acked-by: Shawn Guo <shawn.guo@linaro.org>
* Shawn Guo <shawn.guo@linaro.org> [140223 18:58]: > On Sun, Feb 23, 2014 at 09:40:12PM -0000, Thomas Gleixner wrote: > > Use the proper functions. There is no need to fiddle with irq_desc. > > > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > > Cc: Shawn Guo <shawn.guo@linaro.org> > ... > > arch/arm/mach-imx/pm-imx6q.c | 7 +++---- > > Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
On Sunday 23 February 2014, Thomas Gleixner wrote: > --- tip.orig/arch/arm/mach-omap1/ams-delta-fiq.c > +++ tip/arch/arm/mach-omap1/ams-delta-fiq.c > @@ -44,13 +44,10 @@ static unsigned int irq_counter[16]; > > static irqreturn_t deferred_fiq(int irq, void *dev_id) > { > - struct irq_desc *irq_desc; > - struct irq_chip *irq_chip = NULL; > int gpio, irq_num, fiq_count; > + struct irq_chip *irq_chip; > > - irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); > - if (irq_desc) > - irq_chip = irq_desc->irq_data.chip; > + irq_chip = irq_get_irq_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); I got a compile error because irq_get_irq_chip() doesn't exist. I suppose you meant irq_get_chip. Arnd
Index: tip/arch/arm/mach-imx/pm-imx6q.c =================================================================== --- tip.orig/arch/arm/mach-imx/pm-imx6q.c +++ tip/arch/arm/mach-imx/pm-imx6q.c @@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable) int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) { - struct irq_desc *iomuxc_irq_desc; + struct irq_data *iomuxc_irq_data = irq_get_irq_data(32); u32 val = readl_relaxed(ccm_base + CLPCR); val &= ~BM_CLPCR_LPM; @@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode * 3) Software should mask IRQ #32 right after CCM Low-Power mode * is set (set bits 0-1 of CCM_CLPCR). */ - iomuxc_irq_desc = irq_to_desc(32); - imx_gpc_irq_unmask(&iomuxc_irq_desc->irq_data); + imx_gpc_irq_unmask(iomuxc_irq_data); writel_relaxed(val, ccm_base + CLPCR); - imx_gpc_irq_mask(&iomuxc_irq_desc->irq_data); + imx_gpc_irq_mask(iomuxc_irq_data); return 0; } Index: tip/arch/arm/mach-omap1/ams-delta-fiq.c =================================================================== --- tip.orig/arch/arm/mach-omap1/ams-delta-fiq.c +++ tip/arch/arm/mach-omap1/ams-delta-fiq.c @@ -44,13 +44,10 @@ static unsigned int irq_counter[16]; static irqreturn_t deferred_fiq(int irq, void *dev_id) { - struct irq_desc *irq_desc; - struct irq_chip *irq_chip = NULL; int gpio, irq_num, fiq_count; + struct irq_chip *irq_chip; - irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); - if (irq_desc) - irq_chip = irq_desc->irq_data.chip; + irq_chip = irq_get_irq_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); /* * For each handled GPIO interrupt, keep calling its interrupt handler
Use the proper functions. There is no need to fiddle with irq_desc. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: arm <linux-arm-kernel@lists.infradead.org> Cc: omap <linux-omap@vger.kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> --- arch/arm/mach-imx/pm-imx6q.c | 7 +++---- arch/arm/mach-omap1/ams-delta-fiq.c | 7 ++----- 2 files changed, 5 insertions(+), 9 deletions(-)