From patchwork Wed Mar 26 20:12:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 3895191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 469F19F2B6 for ; Wed, 26 Mar 2014 20:13:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5C9B620237 for ; Wed, 26 Mar 2014 20:13:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07E5720221 for ; Wed, 26 Mar 2014 20:13:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WSuCL-0007GI-Vf; Wed, 26 Mar 2014 20:13:18 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WSuCJ-0002Tp-AK; Wed, 26 Mar 2014 20:13:15 +0000 Received: from quartz.orcorp.ca ([184.70.90.242]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WSuCG-0002Sh-19 for linux-arm-kernel@lists.infradead.org; Wed, 26 Mar 2014 20:13:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=obsidianresearch.com; s=rsa1; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=sYht3tTduDrsNMGwWU8Zq5bgvDNJ434Ap47kCdahAHw=; b=fy8SDi9VLZaW8S797g5OWX4N92ctJyzqckkWYV20b3y869GFaedFkJ9YiyXliPVMzcgpcUFgFgxfM7KIyF51G/ogYoVQCVLhXjHUMTS0ELKVZe781uZm/afwfHR/qKw0Mai68If8SolQRwo+ad9JoR6oAaYTmk0u32mWlTJPS7A=; Received: from [10.0.0.161] (helo=jggl.edm.orcorp.ca) by quartz.orcorp.ca with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1WSuBn-0001U7-HP; Wed, 26 Mar 2014 14:12:43 -0600 Received: from jgg by jggl.edm.orcorp.ca with local (Exim 4.80) (envelope-from ) id 1WSuBn-0002E5-51; Wed, 26 Mar 2014 14:12:43 -0600 Date: Wed, 26 Mar 2014 14:12:43 -0600 From: Jason Gunthorpe To: Neil Greatorex Subject: Re: Intel I350 mini-PCIe card (igb) on Mirabox (mvebu / Armada 370) Message-ID: <20140326201243.GA1536@obsidianresearch.com> References: <20140325202249.GA10378@obsidianresearch.com> <20140325213638.5aba54b6@skate> <20140325222404.GC14718@obsidianresearch.com> <20140325223510.GD14718@obsidianresearch.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-Broken-Reverse-DNS: no host name found for IP address 10.0.0.161 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140326_161312_212938_DE58E14D X-CRM114-Status: GOOD ( 20.27 ) X-Spam-Score: -2.0 (--) Cc: Thomas Petazzoni , Bjorn Helgaas , Jason Cooper , linux-arm-kernel , Willy Tarreau X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Mar 26, 2014 at 07:31:12PM +0000, Neil Greatorex wrote: > > Sorry, it has a mistake, that is not how you detect CRS on this chip.. > > > > CRS might be something the driver has to emulate as well..... > > > > This is better.. CRS will be bit 19 in the ICR > I ran your patch. The dmesg output is available at > https://gist.github.com/ngreatorex/9790164 > > I'm afraid the output doesn't mean much to me :-) This is the relevant bit: [ 0.136040] mvebu-pcie pcie-controller.3: ICR is 0 [ 0.161162] mvebu-pcie pcie-controller.3: Vendor ID is ffffffff [ 0.161170] mvebu-pcie pcie-controller.3: ICR is 800200 [ 1.170071] mvebu-pcie pcie-controller.3: Try 2: Vendor ID is ffffffff [ 1.170083] mvebu-pcie pcie-controller.3: ICR is 808200 #1 The ICR indicates PexLinkFail and NFErrDet after the first vendor read. I think PexLinkFail is very surprising, documentation says it means there was an error on the link and it re-trained. Perhaps it is a side effect of #2.. #2 It looks like I botched the format of the configuration since the NIC didn't respond, I think I see why. #3 After sleeping the PEX detected a UR or CA TLP, which is not necessarily surprising, considering #2.. So, we need a result that actually reads the vendor id.. Here is a revision, I suspect the error with the debugging was not calling mvebu_pcie_set_local_bus_nr, so a type 1 transaction was being produced. I am looking for the 2nd Vendor ID to return 80861521. Also, are you using the "reset-gpios" DT property? diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index b8f2fc9..6da4983 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -999,6 +999,38 @@ static int mvebu_pcie_probe(struct platform_device *pdev) mvebu_pcie_set_local_dev_nr(port, 1); + /* Wait for the link to come up */ + if (!mvebu_pcie_link_up(port)) { + unsigned int I; + + dev_info(&pdev->dev, "Waiting for link up\n"); + for (I = 0; I != 100; I++) { + udelay(100); + if (mvebu_pcie_link_up(port)) + break; + } + dev_info(&pdev->dev, "Link is %u\n", + mvebu_pcie_link_up(port)); + } + + /* Clear and report the ICR */ + mvebu_writel(port, 0, 0x1900); + dev_info(&pdev->dev, "ICR is %x\n", mvebu_readl(port, 0x1900)); + + /* Read the vendor ID from the connected device */ + mvebu_pcie_set_local_bus_nr(port, 1); + mvebu_writel(port, PCIE_CONF_ADDR(1, 0, 0), PCIE_CONF_ADDR_OFF); + dev_info(&pdev->dev, "Vendor ID is %x\n", + mvebu_readl(port, PCIE_CONF_DATA_OFF)); + dev_info(&pdev->dev, "ICR is %x\n", mvebu_readl(port, 0x1900)); + mvebu_writel(port, 0, 0x1900); + msleep(1000); + mvebu_writel(port, PCIE_CONF_ADDR(1, 0, 0), PCIE_CONF_ADDR_OFF); + dev_info(&pdev->dev, "Try 2: Vendor ID is %x\n", + mvebu_readl(port, PCIE_CONF_DATA_OFF)); + dev_info(&pdev->dev, "ICR is %x\n", mvebu_readl(port, 0x1900)); + + port->dn = child; spin_lock_init(&port->conf_lock); mvebu_sw_pci_bridge_init(port);