From patchwork Wed May 21 17:06:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 4218071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1BBED9F1CD for ; Wed, 21 May 2014 17:10:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 303872020F for ; Wed, 21 May 2014 17:10:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6D22202E9 for ; Wed, 21 May 2014 17:10:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn9zA-0002Ub-FW; Wed, 21 May 2014 17:07:24 +0000 Received: from quartz.orcorp.ca ([184.70.90.242]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn9z6-0002Tm-U5 for linux-arm-kernel@lists.infradead.org; Wed, 21 May 2014 17:07:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=obsidianresearch.com; s=rsa1; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:To:From:Date; bh=GIq8/Vr2pLRItsIK75Ju2o3EC52Yon7575e6J9+tss8=; b=TcVTnhOm++GS8ieg3WowoGR1Zzc2HEyfrW75hedY4dwEIgRC5l147SkAiIRNtqqhdvocBrxQqcN87m4pRC6w0LXtJnth85tNF/WZVeR9qgHVyQqeeN3OW2qhBf4f1aEn5+KAZazbhe+BtrfermVK3JJ2tq4wYKnHvK2jqZBslug=; Received: from [10.0.0.161] (helo=jggl.edm.orcorp.ca) by quartz.orcorp.ca with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.72) (envelope-from ) id 1Wn9yX-0002HS-BB; Wed, 21 May 2014 11:06:45 -0600 Received: from jgg by jggl.edm.orcorp.ca with local (Exim 4.82) (envelope-from ) id 1Wn9yW-00060E-V7; Wed, 21 May 2014 11:06:44 -0600 Date: Wed, 21 May 2014 11:06:44 -0600 From: Jason Gunthorpe To: Sunil Kovvuri , linux-pci , Bjorn Helgaas , Catalin Marinas , Will Deacon , Benjamin Herrenschmidt , linaro-kernel , Arnd Bergmann , LKML , "devicetree@vger.kernel.org" , LAKML , Tanmay Inamdar , Grant Likely , "kdb@lurndal.org" , "yu.zhao@intel.com" Subject: Re: [PATCH v7 0/3] Add support for PCI in AArch64 Message-ID: <20140521170644.GJ8775@obsidianresearch.com> References: <1394811258-1500-1-git-send-email-Liviu.Dudau@arm.com> <20140516132451.GK967@e106497-lin.cambridge.arm.com> <20140521113421.GB13511@bart.dudau.co.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140521113421.GB13511@bart.dudau.co.uk> User-Agent: Mutt/1.5.21 (2010-09-15) X-Broken-Reverse-DNS: no host name found for IP address 10.0.0.161 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140521_100721_115359_245C3F92 X-CRM114-Status: GOOD ( 24.03 ) X-Spam-Score: -0.1 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, May 21, 2014 at 12:34:21PM +0100, Liviu Dudau wrote: > On Wed, May 21, 2014 at 04:45:29PM +0530, Sunil Kovvuri wrote: > > Hi Liviu, > > > > Sorry for the trouble. > > I got why 'res->parent' is not set in my case. > > Basically my SR-IOV device has fixed resources, so resources will not > > be allocated/assigned and hence parent resource is not set. > > I will move the resource claiming to host controller driver as a fixup > > so that parent resource hierarchy is set. > > > > Thanks for the support. > > Glad you worked out the cause for the problem. I will still at to my list of > ToDo things to investigate resource parenting with my patchset. We recently fixed some things in this area on mvebu. It is important to ensure that the aperature in the host driver has a proper resource associated with it, or the PCI core won't create sub resources. commit 2613ba480fb7b40c67eea36d03c9946977828623 Author: Jason Gunthorpe Date: Wed Feb 12 15:57:08 2014 -0700 PCI: mvebu: Call request_resource() on the apertures It is typical for host drivers to request a resource for the aperture; once this is done the PCI core will properly populate resources for all BARs in the system. With this patch cat /proc/iomem will now show: e0000000-efffffff : PCI MEM 0000 e0000000-e00fffff : PCI Bus 0000:01 e0000000-e001ffff : 0000:01:00.0 Tested on Kirkwood. Signed-off-by: Arnd Bergmann Signed-off-by: Jason Gunthorpe Signed-off-by: Bjorn Helgaas Acked-by: Jason Cooper diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 05e352889868..d3d1cfd51e09 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -101,7 +101,9 @@ struct mvebu_pcie { struct mvebu_pcie_port *ports; struct msi_chip *msi; struct resource io; + char io_name[30]; struct resource realio; + char mem_name[30]; struct resource mem; struct resource busn; int nports; @@ -672,10 +674,30 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys) { struct mvebu_pcie *pcie = sys_to_pcie(sys); int i; + int domain = 0; - if (resource_size(&pcie->realio) != 0) +#ifdef CONFIG_PCI_DOMAINS + domain = sys->domain; +#endif + + snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x", + domain); + pcie->mem.name = pcie->mem_name; + + snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain); + pcie->realio.name = pcie->io_name; + + if (request_resource(&iomem_resource, &pcie->mem)) + return 0; + + if (resource_size(&pcie->realio) != 0) { + if (request_resource(&ioport_resource, &pcie->realio)) { + release_resource(&pcie->mem); + return 0; + } pci_add_resource_offset(&sys->resources, &pcie->realio, sys->io_offset); + } pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset); pci_add_resource(&sys->resources, &pcie->busn);