From patchwork Wed May 20 10:47:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 6445021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 262E8C0432 for ; Wed, 20 May 2015 10:51:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 33FD720351 for ; Wed, 20 May 2015 10:51:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23F1620303 for ; Wed, 20 May 2015 10:51:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yv1Xy-00060e-8b; Wed, 20 May 2015 10:48:22 +0000 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yv1Xu-0005wv-2b for linux-arm-kernel@lists.infradead.org; Wed, 20 May 2015 10:48:19 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by uk-mta-7.uk.mimecast.lan; Wed, 20 May 2015 11:47:52 +0100 Received: from e106497-lin.cambridge.arm.com ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 20 May 2015 11:47:52 +0100 Received: by e106497-lin.cambridge.arm.com (Postfix, from userid 1005) id 3D345107ACE9; Wed, 20 May 2015 11:47:52 +0100 (BST) Date: Wed, 20 May 2015 11:47:52 +0100 From: Liviu Dudau To: Sudeep Holla Subject: Re: [PATCH v2 0/5] arm64: Juno DT updates and new DT for Juno R1 Message-ID: <20150520104752.GM2175@e106497-lin.cambridge.arm.com> References: <1431970109-8902-1-git-send-email-Liviu.Dudau@arm.com> <555B1A77.9070403@arm.com> MIME-Version: 1.0 In-Reply-To: <555B1A77.9070403@arm.com> User-Agent: Mutt/1.5.22 (2013-10-16) X-OriginalArrivalTime: 20 May 2015 10:47:52.0237 (UTC) FILETIME=[6BCD65D0:01D092EA] X-MC-Unique: 5dSMbdW-T9KPV9K32iquRQ-1 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150520_034818_406942_4C9D3DE5 X-CRM114-Status: GOOD ( 21.25 ) X-Spam-Score: -2.3 (--) Cc: "Jon Medhurst \(Tixy\)" , Mark Rutland , Arnd Bergmann , Ian Campbell , Marc Zyngier , Catalin Marinas , Will Deacon , LKML , devicetree , Rob Herring , Olof Johansson , LAKML X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, May 19, 2015 at 12:11:51PM +0100, Sudeep Holla wrote: > > > On 18/05/15 18:28, Liviu Dudau wrote: > > This series restructures the Juno DT files and introduces the DT > > for the new Juno R1. The board is an update of the Juno R0 with > > support for PCIe, but the current series only brings the board to > > parity with Juno R0. The series that enable the PCIe Generic Host > > Bridge to be used on Juno R1 will be posted separately. > > > > Changes from v1: > > - Moved memory node inside juno-base.dtsi as this is common between > > boards and unlikely to change soon. > > - Added "arm,juno-r1" as compatible string in juno-r1.dts at Jon Medhurst's > > suggestion. > > It would be good to add these juno* compatible somewhere in the binding > document. In past I have seen checkpatch complaining about missing > compatibles on vexpress(which is annoying if you are not adding it > but fixing a bug around existing node). How about something like this: 8<--------------------------------------------------------------------------- From 55b575f3d0888e6134c492b66a3fa12c9cceca02 Mon Sep 17 00:00:00 2001 From: Liviu Dudau Date: Wed, 20 May 2015 11:42:37 +0100 Subject: [PATCH] Documentation: bindings: Add DT bindings for ARM Juno boards. List the required properties and nodes used to describe the ARM Juno boards. Signed-off-by: Liviu Dudau --- Documentation/devicetree/bindings/arm/arm-boards | 66 ++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards index b78564b..1a70997 100644 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ b/Documentation/devicetree/bindings/arm/arm-boards @@ -157,3 +157,69 @@ Example: }; }; + +ARM Versatile Express Boards +----------------------------- +For details on the device tree bindings for ARM Versatile Express boards +please consult the vexpress.txt file in the same directory as this file. + +ARM Juno Boards +---------------- +The Juno boards are targeting development for AArch64 systems. The first +iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64, +with the second iteration, Juno r1, mainly aimed at development of PCIe +based systems. Juno r1 also has support for AXI masters placed on the TLX +connectors to join the coherency domain. + +Juno boards are described in a similar way to ARM Versatile Express boards, +with the motherboard part of the hardware being described in a separate file +to highlight the fact that is part of the support infrastructure for the SoC. +Juno device tree bindings also share the Versatile Express bindings as +described under the RS1 memory mapping. + +Required properties (in root node): + compatible = "arm,juno"; /* For Juno r0 board */ + compatible = "arm,juno-r1"; /* For Juno r1 board */ + +Required nodes: +The description for the board must include: + - a "psci" node describing the boot method used for the secondary CPUs. + A detailed description of the bindings used for "psci" nodes is present + in the psci.txt file. + - a "cpus" node describing the available cores and their associated + "enable-method"s. For more details see cpus.txt file. + +Example: + +/dts-v1/; +/ { + model = "ARM Juno development board (r0)"; + compatible = "arm,juno", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + A57_0: cpu@0 { + compatible = "arm,cortex-a57","arm,armv8"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + }; + + ..... + + A53_0: cpu@100 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + }; + + ..... + }; + +};