From patchwork Wed Jul 8 21:07:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 6751501 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DEFBE9F380 for ; Wed, 8 Jul 2015 21:11:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0E43A20528 for ; Wed, 8 Jul 2015 21:11:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D97BD20531 for ; Wed, 8 Jul 2015 21:11:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCwa9-0004dc-2L; Wed, 08 Jul 2015 21:08:41 +0000 Received: from pandora.arm.linux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCwZe-0004Zh-Nv for linux-arm-kernel@lists.infradead.org; Wed, 08 Jul 2015 21:08:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=pandora-2014; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=6lfg0aEdFGQ4amLLoS9ZdG4oQMORcfeX5i5LUrqU514=; b=H3p5tPUzwFXrwusKIcVhYIHSAycIsbljoMX0HYL8fJWkxQHCjMksioHKxggY1s5Z3bwUzux3piput1MHOXDFbb7V67dwAALNP3N42CqPmNfYDOxEUFuI1eWkgXzzv7rlV+eZ6lwfVIsAb/5kGu3NjYzZc0Zv4HkW7H7MfMV1ROE=; Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:44764) by pandora.arm.linux.org.uk with esmtpsa (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1ZCwZA-00037c-Ea; Wed, 08 Jul 2015 22:07:40 +0100 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1ZCwZ5-0007lX-3i; Wed, 08 Jul 2015 22:07:35 +0100 Date: Wed, 8 Jul 2015 22:07:34 +0100 From: Russell King - ARM Linux To: Dinh Nguyen Subject: Re: [PATCH] ARM: socfpga: put back v7_invalidate_l1 in socfpga_secondary_startup Message-ID: <20150708210734.GN7557@n2100.arm.linux.org.uk> References: <1436370711-18524-1-git-send-email-dinguyen@opensource.altera.com> <20150708165115.GM7557@n2100.arm.linux.org.uk> <559D765C.30102@opensource.altera.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <559D765C.30102@opensource.altera.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150708_140812_033384_648147DD X-CRM114-Status: GOOD ( 12.89 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dinh.linux@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Jul 08, 2015 at 02:13:32PM -0500, Dinh Nguyen wrote: > The value of CPACR is 0x00F00000. So cp11 and cp10 are privileged and > user mode access. Hmm. I think what you've found is a(nother) latent bug in the CPU bring up code. For SMP CPUs, the sequence we're following during early initialisation is: 1. Enable SMP coherency. 2. Invalidate the caches. If the cache contains rubbish, enabling SMP coherency before invalidating the cache is plainly an absurd thing to do. Can you try the patch below - not tested in any way, so you may need to tweak it, but it should allow us to prove that point. Tested-by: Dinh Nguyen diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0716bbe19872..db5137fc297d 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -275,6 +275,10 @@ __v7_b15mp_setup: __v7_ca17mp_setup: mov r10, #0 1: + adr r12, __v7_setup_stack @ the local stack + stmia r12, {r0-r5, r7, r9-r11, lr} + bl v7_invalidate_l1 + ldmia r12, {r0-r5, r7, r9-r11, lr} #ifdef CONFIG_SMP ALT_SMP(mrc p15, 0, r0, c1, c0, 1) ALT_UP(mov r0, #(1 << 6)) @ fake it for UP @@ -283,7 +287,7 @@ __v7_ca17mp_setup: orreq r0, r0, r10 @ Enable CPU-specific SMP bits mcreq p15, 0, r0, c1, c0, 1 #endif - b __v7_setup + b __v7_setup_cont /* * Errata: @@ -417,6 +421,7 @@ __v7_setup: bl v7_invalidate_l1 ldmia r12, {r0-r5, r7, r9, r11, lr} +__v7_setup_cont: and r0, r9, #0xff000000 @ ARM? teq r0, #0x41000000 bne __errata_finish @@ -480,7 +485,7 @@ ENDPROC(__v7_setup) .align 2 __v7_setup_stack: - .space 4 * 11 @ 11 registers + .space 4 * 12 @ 12 registers __INITDATA