From patchwork Fri Aug 7 21:00:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Torokhov X-Patchwork-Id: 6973161 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 046759F373 for ; Fri, 7 Aug 2015 21:03:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B4EC20373 for ; Fri, 7 Aug 2015 21:03:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4912C20361 for ; Fri, 7 Aug 2015 21:03:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZNolR-0003yu-VI; Fri, 07 Aug 2015 21:01:17 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZNolP-0003tW-4C for linux-arm-kernel@lists.infradead.org; Fri, 07 Aug 2015 21:01:15 +0000 Received: by pabxd6 with SMTP id xd6so77389080pab.2 for ; Fri, 07 Aug 2015 14:00:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:mime-version :content-type:content-disposition:user-agent; bh=nMSu1+Xv6GAkjIInYWZ//n9xtV2SUYktQH4IE1WJ/Js=; b=KnPzce+OyKCm5m/wAQI1/TgE6JjZBGSgK88JocyXpTJX45jC24J1UALQrCBtNUwQsY 2zM1yp4rHcfu9tUw45iNloAnMy/HBxvKWisGQVDLboPJ5H3Ko0T7oWV5EHvfmwg55cbV pNwEWcmKlRz3sCaxOEzJHVXy1jpxa/ID93sg7/YvLG/FcuN2/M2uzM+dBypN9B7X9ula 4o8ZqudeGs+Zs30rHvQo0GKOEqV1F6pF/GyHUsjbU4NMF2b8N6H4Vy1E07sSy2SEy0Aq 7si5Jhf/bmujObVKFdriFEBtwQnMk91yoXoZZnNlEtDS4HY+XG7Lc4VFUr6VibiaO/zw oSJg== X-Gm-Message-State: ALoCoQmh5inxexFwvR7lyqbqe5hGGOPQHaLAK+laHI13kvcdyXaUGZGz2IG4zfzQOP9hy5l04G47 X-Received: by 10.66.90.166 with SMTP id bx6mr18662807pab.76.1438981254339; Fri, 07 Aug 2015 14:00:54 -0700 (PDT) Received: from dtor-ws ([2620:0:1000:1301:fda8:35d:f03a:6572]) by smtp.gmail.com with ESMTPSA id fv5sm11159471pdb.19.2015.08.07.14.00.53 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 07 Aug 2015 14:00:54 -0700 (PDT) Date: Fri, 7 Aug 2015 14:00:52 -0700 From: Dmitry Torokhov To: Heiko Stuebner Subject: [PATCH] thermal: rockhip: fix setting thermal shutdown polarity Message-ID: <20150807210052.GA34032@dtor-ws> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150807_140115_265975_4CF125D8 X-CRM114-Status: GOOD ( 12.76 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, dianders@chromium.org, linux-kernel@vger.kernel.org, Eduardo Valentin , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Caesar Wang Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When requested thermal shutdown signal polarity is low we need to make sure that the bit representing high level of signal is reset, and not set all other bits in that register. Also rename TSADCV2_INT_PD_CLEAR to TSADCV2_INT_PD_CLEAR_MASK to better reflect its nature. Signed-off-by: Dmitry Torokhov --- drivers/thermal/rockchip_thermal.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 93ee307..4d5b7d4 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -106,16 +106,14 @@ struct rockchip_thermal_data { #define TSADCV2_AUTO_PERIOD_HT 0x6c #define TSADCV2_AUTO_EN BIT(0) -#define TSADCV2_AUTO_DISABLE ~BIT(0) #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8) -#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8) #define TSADCV2_INT_SRC_EN(chn) BIT(chn) #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) -#define TSADCV2_INT_PD_CLEAR ~BIT(8) +#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) #define TSADCV2_DATA_MASK 0xfff #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 @@ -244,10 +242,10 @@ static void rk_tsadcv2_initialize(void __iomem *regs, enum tshut_polarity tshut_polarity) { if (tshut_polarity == TSHUT_HIGH_ACTIVE) - writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH), + writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON); else - writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW), + writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, regs + TSADCV2_AUTO_CON); writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); @@ -264,7 +262,7 @@ static void rk_tsadcv2_irq_ack(void __iomem *regs) u32 val; val = readl_relaxed(regs + TSADCV2_INT_PD); - writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD); + writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); } static void rk_tsadcv2_control(void __iomem *regs, bool enable)