From patchwork Thu Oct 1 13:00:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Arnaud Patard (Rtp)" X-Patchwork-Id: 7308851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 58655BEEA4 for ; Thu, 1 Oct 2015 13:06:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5E1E720689 for ; Thu, 1 Oct 2015 13:06:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 55D922042B for ; Thu, 1 Oct 2015 13:06:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhdWq-0001Eq-RN; Thu, 01 Oct 2015 13:04:08 +0000 Received: from lebrac.rtp-net.org ([2001:bc8:3430:1000::cafe]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhdWm-000131-Nu for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2015 13:04:06 +0000 Received: by lebrac.rtp-net.org (Postfix, from userid 1000) id 9326A29236; Thu, 1 Oct 2015 15:03:32 +0200 (CEST) Message-Id: <20151001130025.814797537@rtp-net.org> User-Agent: quilt/0.63-1 Date: Thu, 01 Oct 2015 15:00:16 +0200 From: Arnaud Patard (Rtp) To: linux-arm-kernel@lists.infradead.org Subject: [patch 1/1] iop32x: increase irq numbers by 1 References: <20151001130015.092991764@rtp-net.org> MIME-Version: 1.0 Content-Disposition: inline; filename=irq0.patch X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151001_060405_208915_E71990EA X-CRM114-Status: UNSURE ( 9.88 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnaud Patard Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On recent kernels, IRQ0 is not valid. Given that irqs on iop32x are starting at 0, as soon as irq0 (iop-adma) is used, the board will hang. As a simple solution, I'm just increasing the numbers by 1 [ Tested on a ss4000e/em7210 platform with a 4.1 ] Signed-off-by: Arnaud Patard Index: linux-next/arch/arm/mach-iop32x/include/mach/irqs.h =================================================================== --- linux-next.orig/arch/arm/mach-iop32x/include/mach/irqs.h 2015-10-01 14:38:50.190495924 +0200 +++ linux-next/arch/arm/mach-iop32x/include/mach/irqs.h 2015-10-01 14:38:50.182495760 +0200 @@ -15,36 +15,36 @@ /* * IOP80321 chipset interrupts */ -#define IRQ_IOP32X_DMA0_EOT 0 -#define IRQ_IOP32X_DMA0_EOC 1 -#define IRQ_IOP32X_DMA1_EOT 2 -#define IRQ_IOP32X_DMA1_EOC 3 -#define IRQ_IOP32X_AA_EOT 6 -#define IRQ_IOP32X_AA_EOC 7 -#define IRQ_IOP32X_CORE_PMON 8 -#define IRQ_IOP32X_TIMER0 9 -#define IRQ_IOP32X_TIMER1 10 -#define IRQ_IOP32X_I2C_0 11 -#define IRQ_IOP32X_I2C_1 12 -#define IRQ_IOP32X_MESSAGING 13 -#define IRQ_IOP32X_ATU_BIST 14 -#define IRQ_IOP32X_PERFMON 15 -#define IRQ_IOP32X_CORE_PMU 16 -#define IRQ_IOP32X_BIU_ERR 17 -#define IRQ_IOP32X_ATU_ERR 18 -#define IRQ_IOP32X_MCU_ERR 19 -#define IRQ_IOP32X_DMA0_ERR 20 -#define IRQ_IOP32X_DMA1_ERR 21 -#define IRQ_IOP32X_AA_ERR 23 -#define IRQ_IOP32X_MSG_ERR 24 -#define IRQ_IOP32X_SSP 25 -#define IRQ_IOP32X_XINT0 27 -#define IRQ_IOP32X_XINT1 28 -#define IRQ_IOP32X_XINT2 29 -#define IRQ_IOP32X_XINT3 30 -#define IRQ_IOP32X_HPI 31 +#define IRQ_IOP32X_DMA0_EOT (1+0) +#define IRQ_IOP32X_DMA0_EOC (1+1) +#define IRQ_IOP32X_DMA1_EOT (1+2) +#define IRQ_IOP32X_DMA1_EOC (1+3) +#define IRQ_IOP32X_AA_EOT (1+6) +#define IRQ_IOP32X_AA_EOC (1+7) +#define IRQ_IOP32X_CORE_PMON (1+8) +#define IRQ_IOP32X_TIMER0 (1+9) +#define IRQ_IOP32X_TIMER1 (1+10) +#define IRQ_IOP32X_I2C_0 (1+11) +#define IRQ_IOP32X_I2C_1 (1+12) +#define IRQ_IOP32X_MESSAGING (1+13) +#define IRQ_IOP32X_ATU_BIST (1+14) +#define IRQ_IOP32X_PERFMON (1+15) +#define IRQ_IOP32X_CORE_PMU (1+16) +#define IRQ_IOP32X_BIU_ERR (1+17) +#define IRQ_IOP32X_ATU_ERR (1+18) +#define IRQ_IOP32X_MCU_ERR (1+19) +#define IRQ_IOP32X_DMA0_ERR (1+20) +#define IRQ_IOP32X_DMA1_ERR (1+21) +#define IRQ_IOP32X_AA_ERR (1+23) +#define IRQ_IOP32X_MSG_ERR (1+24) +#define IRQ_IOP32X_SSP (1+25) +#define IRQ_IOP32X_XINT0 (1+27) +#define IRQ_IOP32X_XINT1 (1+28) +#define IRQ_IOP32X_XINT2 (1+29) +#define IRQ_IOP32X_XINT3 (1+30) +#define IRQ_IOP32X_HPI (1+31) -#define NR_IRQS 32 +#define NR_IRQS (1+32) #endif Index: linux-next/arch/arm/mach-iop32x/irq.c =================================================================== --- linux-next.orig/arch/arm/mach-iop32x/irq.c 2015-10-01 14:38:50.190495924 +0200 +++ linux-next/arch/arm/mach-iop32x/irq.c 2015-10-01 14:38:50.182495760 +0200 @@ -34,14 +34,14 @@ static void intstr_write(u32 val) static void iop32x_irq_mask(struct irq_data *d) { - iop32x_mask &= ~(1 << d->irq); + iop32x_mask &= ~(1 << (d->irq-1)); intctl_write(iop32x_mask); } static void iop32x_irq_unmask(struct irq_data *d) { - iop32x_mask |= 1 << d->irq; + iop32x_mask |= 1 << (d->irq-1); intctl_write(iop32x_mask); } @@ -67,7 +67,7 @@ void __init iop32x_init_irq(void) machine_is_em7210()) *IOP3XX_PCIIRSR = 0x0f; - for (i = 0; i < NR_IRQS; i++) { + for (i = IRQ_IOP32X_DMA0_EOT; i < NR_IRQS; i++) { irq_set_chip_and_handler(i, &ext_chip, handle_level_irq); irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE); } Index: linux-next/arch/arm/mach-iop32x/include/mach/entry-macro.S =================================================================== --- linux-next.orig/arch/arm/mach-iop32x/include/mach/entry-macro.S 2015-10-01 14:38:50.190495924 +0200 +++ linux-next/arch/arm/mach-iop32x/include/mach/entry-macro.S 2015-10-01 14:38:50.182495760 +0200 @@ -23,6 +23,7 @@ cmp \irqstat, #0 clzne \irqnr, \irqstat rsbne \irqnr, \irqnr, #31 + add \irqnr, \irqnr, #1 .endm .macro arch_ret_to_user, tmp1, tmp2