diff mbox

[V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support

Message ID 20151118151030.GA11558@panicking (mailing list archive)
State New, archived
Headers show

Commit Message

Michael Nazzareno Trimarchi Nov. 18, 2015, 3:10 p.m. UTC
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
I'm not quite sure how ethernet tuning parameter
are working in other setup and this seems the
correct way to use it

Changes in v3:
	- add sgtl audio support
	- add ethernet gigabit tuning
	- use hub reset only in usbhub and not
	  in otg vbus

Changes in v2:
	- add the board in alphabetic order
	- remove cpu operating point
	- remove simple-bus and adjust regulaotor
	- add gpios to correct pinctrl
	- remove no mainline binding of gpc

 arch/arm/boot/dts/Makefile               |   1 +
 arch/arm/boot/dts/imx6q-icore-rqs.dts    |  45 ++++
 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
 3 files changed, 428 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
 create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi

Comments

Michael Nazzareno Trimarchi Nov. 25, 2015, 6:14 p.m. UTC | #1
Hi Shawn

On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
>

As you can see my way to connect the ethernet phy is different. I have
seen that most of the boards put all the tuning under fec but unfortunately
this does not work. I don't know if people check if their value are correctly
written to the phy.

> +
> +&fec {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_enet_3>;
> +       phy-handle = <&eth_phy>;
> +       phy-mode = "rgmii";
> +       status = "okay";
> +       mdio {
> +               eth_phy: ethernet-phy {
> +                       rxc-skew-ps = <1140>;
> +                       txc-skew-ps = <1140>;
> +                       txen-skew-ps = <600>;
> +                       rxdv-skew-ps = <240>;
> +                       rxd0-skew-ps = <420>;
> +                       rxd1-skew-ps = <600>;
> +                       rxd2-skew-ps = <420>;
> +                       rxd3-skew-ps = <240>;
> +                       txd0-skew-ps = <60>;
> +                       txd1-skew-ps = <60>;
> +                       txd2-skew-ps = <60>;
> +                       txd3-skew-ps = <240>;
> +               };
> +       };
> +};
> +

Michael


> +&i2c1 {
> +       status = "okay";
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c2_2>;
> +       status = "okay";
> +};
> +
> +&i2c3 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c3_4>;
> +       status = "okay";
> +};
> +
> +&pcie {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_pcie>;
> +       reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> +       status = "okay";
> +};
> +
> +&ssi1 {
> +       fsl,mode = "i2s-slave";
> +       status = "okay";
> +};
> +
> +&uart4 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_uart4_1>;
> +       status = "okay";
> +};
> +
> +&usbh1 {
> +       vbus-supply = <&reg_usb_h1_vbus>;
> +       disable-over-current;
> +       clocks = <&clks IMX6QDL_CLK_USBOH3>;
> +       status = "okay";
> +};
> +
> +&usbotg {
> +       vbus-supply = <&reg_usb_otg_vbus>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usbotg_2>;
> +       disable-over-current;
> +       status = "okay";
> +};
> +
> +&usdhc1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_usdhc1_1>;
> +       no-1-8-v;
> +       status = "okay";
> +};
> +
> +&usdhc3 {
> +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +       pinctrl-0 = <&pinctrl_usdhc3_2>;
> +       pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> +       pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> +       vmcc-supply = <&reg_sd3_vmmc>;
> +       cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> +       bus-witdh=<4>;
> +       no-1-8-v;
> +       status = "okay";
> +};
> +
> +&usdhc4 {
> +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +       pinctrl-0 = <&pinctrl_usdhc4_1>;
> +       pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> +       pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> +       vmcc-supply = <&reg_sd4_vmmc>;
> +       bus-witdh=<8>;
> +       no-1-8-v;
> +       non-removable;
> +       status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |
Shawn Guo Dec. 2, 2015, 2:09 a.m. UTC | #2
On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
> Hi Shawn
> 
> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> >
> 
> As you can see my way to connect the ethernet phy is different. I have
> seen that most of the boards put all the tuning under fec but unfortunately
> this does not work. I don't know if people check if their value are correctly
> written to the phy.

Hmm, I'm not sure what example you are looking at.  But here is what I
see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

&fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rgmii";
        phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
        txen-skew-ps = <0>;
        txc-skew-ps = <3000>;
        rxdv-skew-ps = <0>;
        rxc-skew-ps = <3000>;
        rxd0-skew-ps = <0>;
        rxd1-skew-ps = <0>;
        rxd2-skew-ps = <0>;
        rxd3-skew-ps = <0>;
        txd0-skew-ps = <0>;
        txd1-skew-ps = <0>;
        txd2-skew-ps = <0>;
        txd3-skew-ps = <0>;
        interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
                              <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
        status = "okay";
};

Shawn

> 
> > +
> > +&fec {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&pinctrl_enet_3>;
> > +       phy-handle = <&eth_phy>;
> > +       phy-mode = "rgmii";
> > +       status = "okay";
> > +       mdio {
> > +               eth_phy: ethernet-phy {
> > +                       rxc-skew-ps = <1140>;
> > +                       txc-skew-ps = <1140>;
> > +                       txen-skew-ps = <600>;
> > +                       rxdv-skew-ps = <240>;
> > +                       rxd0-skew-ps = <420>;
> > +                       rxd1-skew-ps = <600>;
> > +                       rxd2-skew-ps = <420>;
> > +                       rxd3-skew-ps = <240>;
> > +                       txd0-skew-ps = <60>;
> > +                       txd1-skew-ps = <60>;
> > +                       txd2-skew-ps = <60>;
> > +                       txd3-skew-ps = <240>;
> > +               };
> > +       };
> > +};
> > +
Michael Nazzareno Trimarchi Dec. 2, 2015, 9:15 a.m. UTC | #3
Hi

On Wed, Dec 2, 2015 at 3:09 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
>> Hi Shawn
>>
>> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>> >
>> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> > ---
>> > I'm not quite sure how ethernet tuning parameter
>> > are working in other setup and this seems the
>> > correct way to use it
>> >
>>
>> As you can see my way to connect the ethernet phy is different. I have
>> seen that most of the boards put all the tuning under fec but unfortunately
>> this does not work. I don't know if people check if their value are correctly
>> written to the phy.
>
> Hmm, I'm not sure what example you are looking at.  But here is what I
> see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>
> &fec {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_enet>;
>         phy-mode = "rgmii";
>         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
>         txen-skew-ps = <0>;
>         txc-skew-ps = <3000>;
>         rxdv-skew-ps = <0>;
>         rxc-skew-ps = <3000>;
>         rxd0-skew-ps = <0>;
>         rxd1-skew-ps = <0>;
>         rxd2-skew-ps = <0>;
>         rxd3-skew-ps = <0>;
>         txd0-skew-ps = <0>;
>         txd1-skew-ps = <0>;
>         txd2-skew-ps = <0>;
>         txd3-skew-ps = <0>;
>         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
>                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
>         status = "okay";
> };
>

Yes sorry, could be only one. According in what I have seen this can
not work and the information stored in the
fec parameters are not written in the registers. Other small thing is
the IMX6/7 default config does not include
this phy at all, but that is a minor issue. Can you please do the
final review of my board so I can take care on this
too for Sabrelite?

Michael

> Shawn
>
>>
>> > +
>> > +&fec {
>> > +       pinctrl-names = "default";
>> > +       pinctrl-0 = <&pinctrl_enet_3>;
>> > +       phy-handle = <&eth_phy>;
>> > +       phy-mode = "rgmii";
>> > +       status = "okay";
>> > +       mdio {
>> > +               eth_phy: ethernet-phy {
>> > +                       rxc-skew-ps = <1140>;
>> > +                       txc-skew-ps = <1140>;
>> > +                       txen-skew-ps = <600>;
>> > +                       rxdv-skew-ps = <240>;
>> > +                       rxd0-skew-ps = <420>;
>> > +                       rxd1-skew-ps = <600>;
>> > +                       rxd2-skew-ps = <420>;
>> > +                       rxd3-skew-ps = <240>;
>> > +                       txd0-skew-ps = <60>;
>> > +                       txd1-skew-ps = <60>;
>> > +                       txd2-skew-ps = <60>;
>> > +                       txd3-skew-ps = <240>;
>> > +               };
>> > +       };
>> > +};
>> > +
Shawn Guo Dec. 11, 2015, 8:36 a.m. UTC | #4
On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> 
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
> 
> Changes in v3:
> 	- add sgtl audio support
> 	- add ethernet gigabit tuning
> 	- use hub reset only in usbhub and not
> 	  in otg vbus
> 
> Changes in v2:
> 	- add the board in alphabetic order
> 	- remove cpu operating point
> 	- remove simple-bus and adjust regulaotor
> 	- add gpios to correct pinctrl
> 	- remove no mainline binding of gpc
> 
>  arch/arm/boot/dts/Makefile               |   1 +
>  arch/arm/boot/dts/imx6q-icore-rqs.dts    |  45 ++++
>  arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
>  3 files changed, 428 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
>  create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
>  	imx6q-gw551x.dtb \
>  	imx6q-gw552x.dtb \
>  	imx6q-hummingboard.dtb \
> +	imx6q-icore-rqs.dtb \
>  	imx6q-nitrogen6x.dtb \
>  	imx6q-phytec-pbab01.dtb \
>  	imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..8f14edf
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,45 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */

Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
You can find a lot of examples in arch/arm/boot/dts.

> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> +	model = "Engicam i.CoreM6 Quad SOM";
> +	compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";

This is not a board from Freescale, so 'fsl,' is not a appropriate for
the board compatible imx6q-icore-rqs.

> +
> +	sound {
> +		compatible = "fsl,imx-audio-sgtl5000";
> +		model = "imx-audio-sgtl5000";
> +		ssi-controller = <&ssi1>;
> +		audio-codec = <&codec>;
> +		audio-routing =
> +			"MIC_IN", "Mic Jack",
> +			"Mic Jack", "Mic Bias",
> +			"Headphone Jack", "HP_OUT";
> +		mux-int-port = <1>;
> +		mux-ext-port = <4>;
> +	};
> +};
> +
> +&sata {
> +	status = "okay";
> +};

Please sort them labelled nodes alphabetically.

> +
> +&i2c3 {
> +	codec: sgtl5000@0a {
> +		compatible = "fsl,sgtl5000";
> +		reg = <0x0a>;
> +		clocks = <&clks IMX6QDL_CLK_CKO>;
> +		VDDA-supply = <&reg_2p5v>;
> +		VDDIO-supply = <&reg_3p3v>;
> +		VDDD-supply = <&reg_1p8v>;
> +	};
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..c57a830
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,382 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> +	memory {
> +		reg = <0x10000000 0x80000000>;
> +	};
> +
> +	reg_1p8v: 1p8v {

Can we name these regulator nodes a bit better, something like
'regulator-1pv8'?

> +		compatible = "regulator-fixed";
> +		regulator-name = "1P8V";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_2p5v: 2p5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "2P5V";
> +		regulator-min-microvolt = <2500000>;
> +		regulator-max-microvolt = <2500000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_3p3v: 3p3v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "3P3V";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_sd3_vmmc: sd3_vmmc {

It's more idiomatic to use minus than underscore in node name.

> +		compatible = "regulator-fixed";
> +		regulator-name = "P3V3_SD3_SWITCHED";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> +		enable-active-high;
> +	};
> +
> +	reg_sd4_vmmc: sd4_vmmc {
> +		compatible = "regulator-fixed";
> +		regulator-name = "P3V3_SD4_SWITCHED";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_usb_h1_vbus: usb_h1_vbus {
> +		compatible = "regulator-fixed";
> +		regulator-name = "usb_h1_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_usb_otg_vbus: usb_otg_vbus {
> +		compatible = "regulator-fixed";
> +		regulator-name = "usb_otg_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	usb_hub: usb-hub {
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usbhub>;
> +		compatible = "smsc,usb3503a";

Let 'compatible' be the top of the property list.

> +		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> +		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> +		clock-names = "refclk";
> +	};

How is this device get connected?  The most common case is via I2C bus.
In that case, the node shouldn't be here but under I2C node.

> +};
> +
> +&iomuxc {

Suggest move iomuxc node to the bottom to make the file a bit easier to
read.

> +	imx6qdl-icore-rqs {
> +

With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
nodes) in place, we can now save this container.

> +		pinctrl_audmux_4: audmux-4 {

The suffix numbering makes no sense in this case.  The following example
should be good enough.

		pinctrl_audmux: audmux {

> +			fsl,pins = <
> +				MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
> +				MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
> +				MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> +				MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
> +			>;
> +		};
> +
> +		pinctrl_enet_3: enetgrp-3 {
> +			fsl,pins = <
> +				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
> +				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
> +				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
> +				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
> +				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
> +				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
> +				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
> +				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> +				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
> +				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
> +				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
> +				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
> +				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
> +				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
> +				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> +				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
> +			>;
> +		};
> +
> +		pinctrl_i2c1_1: i2c1grp-1 {
> +			fsl,pins = <
> +				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> +				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c2_2: i2c2grp-2 {
> +			fsl,pins = <
> +				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> +				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> +			>;
> +		};
> +
> +		pinctrl_i2c3_4: i2c3grp-4 {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
> +				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> +				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
> +			>;
> +		};
> +
> +		pinctrl_pcie: pciegrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059	/* PCIe Reset */
> +			>;
> +		};
> +
> +		pinctrl_uart4_1: uart4grp-1 {
> +			fsl,pins = <
> +				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> +				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> +			>;
> +		};
> +
> +		pinctrl_usbhub: usbhubgrp {
> +			fsl,pins = <
> +				MX6QDL_PAD_GPIO_6__GPIO1_IO06  0x1f059	/* HUB USB Reset */
> +			>;
> +		};
> +
> +		pinctrl_usbotg_2: usbotggrp-2 {
> +			fsl,pins = <
> +				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> +			>;
> +		};
> +
> +		pinctrl_usdhc1_1: usdhc1grp-1 {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
> +				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
> +				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> +				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> +				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> +				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> +			>;
> +		};
> +
> +		pinctrl_usdhc3_2: usdhc3grp-2 {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
> +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
> +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> +				MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1f059	/* CD */
> +				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1f059	/* PWR */
> +			>;
> +		};
> +
> +		pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
> +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
> +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> +			>;
> +		};
> +
> +		pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
> +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
> +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> +			>;
> +		};
> +
> +		pinctrl_usdhc4_1: usdhc4grp-1 {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
> +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
> +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> +			>;
> +		};
> +
> +		pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
> +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
> +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> +			>;
> +		};
> +
> +		pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> +			fsl,pins = <
> +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
> +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
> +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> +			>;
> +		};
> +	};
> +};
> +
> +&clks {
> +	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> +	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_audmux_4>;
> +	status = "okay";
> +};
> +
> +&fec {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_enet_3>;
> +	phy-handle = <&eth_phy>;
> +	phy-mode = "rgmii";
> +	status = "okay";
> +	mdio {
> +		eth_phy: ethernet-phy {
> +			rxc-skew-ps = <1140>;
> +			txc-skew-ps = <1140>;
> +			txen-skew-ps = <600>;
> +			rxdv-skew-ps = <240>;
> +			rxd0-skew-ps = <420>;
> +			rxd1-skew-ps = <600>;
> +			rxd2-skew-ps = <420>;
> +			rxd3-skew-ps = <240>;
> +			txd0-skew-ps = <60>;
> +			txd1-skew-ps = <60>;
> +			txd2-skew-ps = <60>;
> +			txd3-skew-ps = <240>;
> +		};
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";

Let 'status' be the last property.

Shawn

> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c2_2>;
> +	status = "okay";
> +};
> +
> +&i2c3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c3_4>;
> +	status = "okay";
> +};
> +
> +&pcie {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pcie>;
> +	reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +};
> +
> +&ssi1 {
> +	fsl,mode = "i2s-slave";
> +	status = "okay";
> +};
> +
> +&uart4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart4_1>;
> +	status = "okay";
> +};
> +
> +&usbh1 {
> +	vbus-supply = <&reg_usb_h1_vbus>;
> +	disable-over-current;
> +	clocks = <&clks IMX6QDL_CLK_USBOH3>;
> +	status = "okay";
> +};
> +
> +&usbotg {
> +	vbus-supply = <&reg_usb_otg_vbus>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usbotg_2>;
> +	disable-over-current;
> +	status = "okay";
> +};
> +
> +&usdhc1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usdhc1_1>;
> +	no-1-8-v;
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3_2>;
> +	pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> +	vmcc-supply = <&reg_sd3_vmmc>;
> +	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> +	bus-witdh=<4>;
> +	no-1-8-v;
> +	status = "okay";
> +};
> +
> +&usdhc4 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc4_1>;
> +	pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> +	vmcc-supply = <&reg_sd4_vmmc>;
> +	bus-witdh=<8>;
> +	no-1-8-v;
> +	non-removable;
> +	status = "okay";
> +};
> -- 
> 2.6.3
> 
> -- 
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |
>
Michael Nazzareno Trimarchi Dec. 14, 2015, 8:45 a.m. UTC | #5
Hi

On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > 
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> > 
> > Changes in v3:
> > 	- add sgtl audio support
> > 	- add ethernet gigabit tuning
> > 	- use hub reset only in usbhub and not
> > 	  in otg vbus
> > 
> > Changes in v2:
> > 	- add the board in alphabetic order
> > 	- remove cpu operating point
> > 	- remove simple-bus and adjust regulaotor
> > 	- add gpios to correct pinctrl
> > 	- remove no mainline binding of gpc
> > 
> >  arch/arm/boot/dts/Makefile               |   1 +
> >  arch/arm/boot/dts/imx6q-icore-rqs.dts    |  45 ++++
> >  arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> >  3 files changed, 428 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> >  create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > 
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index bb8fa02..7e8f29c 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> >  	imx6q-gw551x.dtb \
> >  	imx6q-gw552x.dtb \
> >  	imx6q-hummingboard.dtb \
> > +	imx6q-icore-rqs.dtb \
> >  	imx6q-nitrogen6x.dtb \
> >  	imx6q-phytec-pbab01.dtb \
> >  	imx6q-rex-pro.dtb \
> > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > new file mode 100644
> > index 0000000..8f14edf
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > @@ -0,0 +1,45 @@
> > +/*
> > + * Copyright (C) 2015 Amarula Solutions B.V.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> 
> Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> You can find a lot of examples in arch/arm/boot/dts.
> 

Ok

> > +
> > +/dts-v1/;
> > +
> > +#include "imx6q.dtsi"
> > +#include "imx6qdl-icore-rqs.dtsi"
> > +
> > +/ {
> > +	model = "Engicam i.CoreM6 Quad SOM";
> > +	compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> 
> This is not a board from Freescale, so 'fsl,' is not a appropriate for
> the board compatible imx6q-icore-rqs.
> 

let use eng,imx6-icore-rqs

> > +
> > +	sound {
> > +		compatible = "fsl,imx-audio-sgtl5000";
> > +		model = "imx-audio-sgtl5000";
> > +		ssi-controller = <&ssi1>;
> > +		audio-codec = <&codec>;
> > +		audio-routing =
> > +			"MIC_IN", "Mic Jack",
> > +			"Mic Jack", "Mic Bias",
> > +			"Headphone Jack", "HP_OUT";
> > +		mux-int-port = <1>;
> > +		mux-ext-port = <4>;
> > +	};
> > +};
> > +
> > +&sata {
> > +	status = "okay";
> > +};
> 
> Please sort them labelled nodes alphabetically.
> 

ok

> > +
> > +&i2c3 {
> > +	codec: sgtl5000@0a {
> > +		compatible = "fsl,sgtl5000";
> > +		reg = <0x0a>;
> > +		clocks = <&clks IMX6QDL_CLK_CKO>;
> > +		VDDA-supply = <&reg_2p5v>;
> > +		VDDIO-supply = <&reg_3p3v>;
> > +		VDDD-supply = <&reg_1p8v>;
> > +	};
> > +};
> > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > new file mode 100644
> > index 0000000..c57a830
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > @@ -0,0 +1,382 @@
> > +/*
> > + * Copyright 2015 Amarula Solutions B.V.
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > +
> > +/ {
> > +	memory {
> > +		reg = <0x10000000 0x80000000>;
> > +	};
> > +
> > +	reg_1p8v: 1p8v {
> 
> Can we name these regulator nodes a bit better, something like
> 'regulator-1pv8'?
> 

ok

> > +		compatible = "regulator-fixed";
> > +		regulator-name = "1P8V";
> > +		regulator-min-microvolt = <1800000>;
> > +		regulator-max-microvolt = <1800000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	reg_2p5v: 2p5v {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "2P5V";
> > +		regulator-min-microvolt = <2500000>;
> > +		regulator-max-microvolt = <2500000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	reg_3p3v: 3p3v {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "3P3V";
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	reg_sd3_vmmc: sd3_vmmc {
> 
> It's more idiomatic to use minus than underscore in node name.
> 

ok

> > +		compatible = "regulator-fixed";
> > +		regulator-name = "P3V3_SD3_SWITCHED";
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-max-microvolt = <3300000>;
> > +		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > +		enable-active-high;
> > +	};
> > +
> > +	reg_sd4_vmmc: sd4_vmmc {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "P3V3_SD4_SWITCHED";
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	reg_usb_h1_vbus: usb_h1_vbus {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "usb_h1_vbus";
> > +		regulator-min-microvolt = <5000000>;
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	reg_usb_otg_vbus: usb_otg_vbus {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "usb_otg_vbus";
> > +		regulator-min-microvolt = <5000000>;
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +	};
> > +
> > +	usb_hub: usb-hub {
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_usbhub>;
> > +		compatible = "smsc,usb3503a";
> 
> Let 'compatible' be the top of the property list.
>

ok

> > +		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > +		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > +		clock-names = "refclk";
> > +	};
> 
> How is this device get connected?  The most common case is via I2C bus.
> In that case, the node shouldn't be here but under I2C node.
> 

It's correct, the connection is completly defined and it's not connected
to i2c according from what I know. I will double check

> > +};
> > +
> > +&iomuxc {
> 
> Suggest move iomuxc node to the bottom to make the file a bit easier to
> read.
> 

Ok


> > +	imx6qdl-icore-rqs {
> > +
> 
> With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> nodes) in place, we can now save this container.
> 
> > +		pinctrl_audmux_4: audmux-4 {
> 

I will take a look of that commit

> The suffix numbering makes no sense in this case.  The following example
> should be good enough.
> 
> 		pinctrl_audmux: audmux {
> 
> > +			fsl,pins = <
> > +				MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
> > +				MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
> > +				MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > +				MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
> > +			>;
> > +		};
> > +
> > +		pinctrl_enet_3: enetgrp-3 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
> > +				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
> > +				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
> > +				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
> > +				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
> > +				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
> > +				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
> > +				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > +				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
> > +				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
> > +				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
> > +				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
> > +				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
> > +				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
> > +				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > +				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
> > +			>;
> > +		};
> > +
> > +		pinctrl_i2c1_1: i2c1grp-1 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > +				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > +			>;
> > +		};
> > +
> > +		pinctrl_i2c2_2: i2c2grp-2 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > +				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > +			>;
> > +		};
> > +
> > +		pinctrl_i2c3_4: i2c3grp-4 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
> > +				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > +				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
> > +			>;
> > +		};
> > +
> > +		pinctrl_pcie: pciegrp {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059	/* PCIe Reset */
> > +			>;
> > +		};
> > +
> > +		pinctrl_uart4_1: uart4grp-1 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > +				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > +			>;
> > +		};
> > +
> > +		pinctrl_usbhub: usbhubgrp {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_GPIO_6__GPIO1_IO06  0x1f059	/* HUB USB Reset */
> > +			>;
> > +		};
> > +
> > +		pinctrl_usbotg_2: usbotggrp-2 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc1_1: usdhc1grp-1 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
> > +				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
> > +				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > +				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > +				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > +				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc3_2: usdhc3grp-2 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
> > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
> > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > +				MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1f059	/* CD */
> > +				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1f059	/* PWR */
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
> > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
> > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
> > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
> > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc4_1: usdhc4grp-1 {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
> > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
> > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
> > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
> > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > +			>;
> > +		};
> > +
> > +		pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > +			fsl,pins = <
> > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
> > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
> > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > +			>;
> > +		};
> > +	};
> > +};
> > +
> > +&clks {
> > +	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > +	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > +};
> > +
> > +&audmux {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_audmux_4>;
> > +	status = "okay";
> > +};
> > +
> > +&fec {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_enet_3>;
> > +	phy-handle = <&eth_phy>;
> > +	phy-mode = "rgmii";
> > +	status = "okay";
> > +	mdio {
> > +		eth_phy: ethernet-phy {
> > +			rxc-skew-ps = <1140>;
> > +			txc-skew-ps = <1140>;
> > +			txen-skew-ps = <600>;
> > +			rxdv-skew-ps = <240>;
> > +			rxd0-skew-ps = <420>;
> > +			rxd1-skew-ps = <600>;
> > +			rxd2-skew-ps = <420>;
> > +			rxd3-skew-ps = <240>;
> > +			txd0-skew-ps = <60>;
> > +			txd1-skew-ps = <60>;
> > +			txd2-skew-ps = <60>;
> > +			txd3-skew-ps = <240>;
> > +		};
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> 
> Let 'status' be the last property.
> 

Ok

I will repost again

Michael

> Shawn
> 
> > +	clock-frequency = <100000>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_i2c1_1>;
> > +};
> > +
> > +&i2c2 {
> > +	clock-frequency = <100000>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_i2c2_2>;
> > +	status = "okay";
> > +};
> > +
> > +&i2c3 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_i2c3_4>;
> > +	status = "okay";
> > +};
> > +
> > +&pcie {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_pcie>;
> > +	reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > +	status = "okay";
> > +};
> > +
> > +&ssi1 {
> > +	fsl,mode = "i2s-slave";
> > +	status = "okay";
> > +};
> > +
> > +&uart4 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart4_1>;
> > +	status = "okay";
> > +};
> > +
> > +&usbh1 {
> > +	vbus-supply = <&reg_usb_h1_vbus>;
> > +	disable-over-current;
> > +	clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > +	status = "okay";
> > +};
> > +
> > +&usbotg {
> > +	vbus-supply = <&reg_usb_otg_vbus>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usbotg_2>;
> > +	disable-over-current;
> > +	status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usdhc1_1>;
> > +	no-1-8-v;
> > +	status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +	pinctrl-0 = <&pinctrl_usdhc3_2>;
> > +	pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > +	pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > +	vmcc-supply = <&reg_sd3_vmmc>;
> > +	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > +	bus-witdh=<4>;
> > +	no-1-8-v;
> > +	status = "okay";
> > +};
> > +
> > +&usdhc4 {
> > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +	pinctrl-0 = <&pinctrl_usdhc4_1>;
> > +	pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > +	pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > +	vmcc-supply = <&reg_sd4_vmmc>;
> > +	bus-witdh=<8>;
> > +	no-1-8-v;
> > +	non-removable;
> > +	status = "okay";
> > +};
> > -- 
> > 2.6.3
> > 
> > -- 
> > | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> > | COO  -  Founder                                      Cruquiuskade 47 |
> > | +31(0)851119172                                 Amsterdam 1018 AM NL |
> > |                  [`as] http://www.amarulasolutions.com               |
> >
Michael Nazzareno Trimarchi Dec. 16, 2015, 6:12 p.m. UTC | #6
Hi

I have address most of the changes but I have problem when I remove
the group of pinctrl as you suggest

On Mon, Dec 14, 2015 at 09:44:56AM +0100, Michael Trimarchi wrote:
> Hi
> 
> On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> > On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > 
> > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > ---
> > > I'm not quite sure how ethernet tuning parameter
> > > are working in other setup and this seems the
> > > correct way to use it
> > > 
> > > Changes in v3:
> > > 	- add sgtl audio support
> > > 	- add ethernet gigabit tuning
> > > 	- use hub reset only in usbhub and not
> > > 	  in otg vbus
> > > 
> > > Changes in v2:
> > > 	- add the board in alphabetic order
> > > 	- remove cpu operating point
> > > 	- remove simple-bus and adjust regulaotor
> > > 	- add gpios to correct pinctrl
> > > 	- remove no mainline binding of gpc
> > > 
> > >  arch/arm/boot/dts/Makefile               |   1 +
> > >  arch/arm/boot/dts/imx6q-icore-rqs.dts    |  45 ++++
> > >  arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> > >  3 files changed, 428 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > >  create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > 
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index bb8fa02..7e8f29c 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > >  	imx6q-gw551x.dtb \
> > >  	imx6q-gw552x.dtb \
> > >  	imx6q-hummingboard.dtb \
> > > +	imx6q-icore-rqs.dtb \
> > >  	imx6q-nitrogen6x.dtb \
> > >  	imx6q-phytec-pbab01.dtb \
> > >  	imx6q-rex-pro.dtb \
> > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > new file mode 100644
> > > index 0000000..8f14edf
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > @@ -0,0 +1,45 @@
> > > +/*
> > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> > 
> > Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> > You can find a lot of examples in arch/arm/boot/dts.
> > 
> 
> Ok
> 
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "imx6q.dtsi"
> > > +#include "imx6qdl-icore-rqs.dtsi"
> > > +
> > > +/ {
> > > +	model = "Engicam i.CoreM6 Quad SOM";
> > > +	compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > 
> > This is not a board from Freescale, so 'fsl,' is not a appropriate for
> > the board compatible imx6q-icore-rqs.
> > 
> 
> let use eng,imx6-icore-rqs
> 

That I have fixed

> > > +
> > > +	sound {
> > > +		compatible = "fsl,imx-audio-sgtl5000";
> > > +		model = "imx-audio-sgtl5000";
> > > +		ssi-controller = <&ssi1>;
> > > +		audio-codec = <&codec>;
> > > +		audio-routing =
> > > +			"MIC_IN", "Mic Jack",
> > > +			"Mic Jack", "Mic Bias",
> > > +			"Headphone Jack", "HP_OUT";
> > > +		mux-int-port = <1>;
> > > +		mux-ext-port = <4>;
> > > +	};
> > > +};
> > > +
> > > +&sata {
> > > +	status = "okay";
> > > +};
> > 
> > Please sort them labelled nodes alphabetically.
> > 
> 
> ok
> 

You mean sata and i2c?


> > > +
> > > +&i2c3 {
> > > +	codec: sgtl5000@0a {
> > > +		compatible = "fsl,sgtl5000";
> > > +		reg = <0x0a>;
> > > +		clocks = <&clks IMX6QDL_CLK_CKO>;
> > > +		VDDA-supply = <&reg_2p5v>;
> > > +		VDDIO-supply = <&reg_3p3v>;
> > > +		VDDD-supply = <&reg_1p8v>;
> > > +	};
> > > +};
> > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > new file mode 100644
> > > index 0000000..c57a830
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > @@ -0,0 +1,382 @@
> > > +/*
> > > + * Copyright 2015 Amarula Solutions B.V.
> > > + *
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > +
> > > +/ {
> > > +	memory {
> > > +		reg = <0x10000000 0x80000000>;
> > > +	};
> > > +
> > > +	reg_1p8v: 1p8v {
> > 
> > Can we name these regulator nodes a bit better, something like
> > 'regulator-1pv8'?
> > 
> 
> ok
> 
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "1P8V";
> > > +		regulator-min-microvolt = <1800000>;
> > > +		regulator-max-microvolt = <1800000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	reg_2p5v: 2p5v {
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "2P5V";
> > > +		regulator-min-microvolt = <2500000>;
> > > +		regulator-max-microvolt = <2500000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	reg_3p3v: 3p3v {
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "3P3V";
> > > +		regulator-min-microvolt = <3300000>;
> > > +		regulator-max-microvolt = <3300000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	reg_sd3_vmmc: sd3_vmmc {
> > 
> > It's more idiomatic to use minus than underscore in node name.
> > 
> 
> ok
> 
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "P3V3_SD3_SWITCHED";
> > > +		regulator-min-microvolt = <3300000>;
> > > +		regulator-max-microvolt = <3300000>;
> > > +		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > +		enable-active-high;
> > > +	};
> > > +
> > > +	reg_sd4_vmmc: sd4_vmmc {
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "P3V3_SD4_SWITCHED";
> > > +		regulator-min-microvolt = <3300000>;
> > > +		regulator-max-microvolt = <3300000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	reg_usb_h1_vbus: usb_h1_vbus {
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "usb_h1_vbus";
> > > +		regulator-min-microvolt = <5000000>;
> > > +		regulator-max-microvolt = <5000000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	reg_usb_otg_vbus: usb_otg_vbus {
> > > +		compatible = "regulator-fixed";
> > > +		regulator-name = "usb_otg_vbus";
> > > +		regulator-min-microvolt = <5000000>;
> > > +		regulator-max-microvolt = <5000000>;
> > > +		regulator-boot-on;
> > > +		regulator-always-on;
> > > +	};
> > > +
> > > +	usb_hub: usb-hub {
> > > +		pinctrl-names = "default";
> > > +		pinctrl-0 = <&pinctrl_usbhub>;
> > > +		compatible = "smsc,usb3503a";
> > 
> > Let 'compatible' be the top of the property list.
> >
> 
> ok
> 
> > > +		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > > +		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > > +		clock-names = "refclk";
> > > +	};
> > 
> > How is this device get connected?  The most common case is via I2C bus.
> > In that case, the node shouldn't be here but under I2C node.
> > 
> 
> It's correct, the connection is completly defined and it's not connected
> to i2c according from what I know. I will double check
> 

It's fine as it is

> > > +};
> > > +
> > > +&iomuxc {
> > 
> > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > read.
> > 
> 
> Ok
> 
> 
> > > +	imx6qdl-icore-rqs {
> > > +
> > 
> > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > nodes) in place, we can now save this container.
> > 

If I save this I can not register usb. Group is not found

[    2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[    2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[    2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
[    2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[    2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[    2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
[    2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[    2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[    2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22

Michael

> > > +		pinctrl_audmux_4: audmux-4 {
> > 
> 
> I will take a look of that commit
> 
> > The suffix numbering makes no sense in this case.  The following example
> > should be good enough.
> > 
> > 		pinctrl_audmux: audmux {
> > 
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
> > > +				MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
> > > +				MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > > +				MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_enet_3: enetgrp-3 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
> > > +				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > > +				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
> > > +				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > > +				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_i2c1_1: i2c1grp-1 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > > +				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_i2c2_2: i2c2grp-2 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > > +				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_i2c3_4: i2c3grp-4 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
> > > +				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > > +				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_pcie: pciegrp {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059	/* PCIe Reset */
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_uart4_1: uart4grp-1 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > > +				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usbhub: usbhubgrp {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_GPIO_6__GPIO1_IO06  0x1f059	/* HUB USB Reset */
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usbotg_2: usbotggrp-2 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc1_1: usdhc1grp-1 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
> > > +				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
> > > +				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > > +				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > > +				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > > +				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc3_2: usdhc3grp-2 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
> > > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
> > > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > > +				MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1f059	/* CD */
> > > +				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1f059	/* PWR */
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
> > > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
> > > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
> > > +				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
> > > +				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > > +				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > > +				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > > +				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc4_1: usdhc4grp-1 {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
> > > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
> > > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
> > > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
> > > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > > +			>;
> > > +		};
> > > +
> > > +		pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > > +			fsl,pins = <
> > > +				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
> > > +				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
> > > +				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > > +				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > > +			>;
> > > +		};
> > > +	};
> > > +};
> > > +
> > > +&clks {
> > > +	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > > +	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > > +};
> > > +
> > > +&audmux {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_audmux_4>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&fec {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_enet_3>;
> > > +	phy-handle = <&eth_phy>;
> > > +	phy-mode = "rgmii";
> > > +	status = "okay";
> > > +	mdio {
> > > +		eth_phy: ethernet-phy {
> > > +			rxc-skew-ps = <1140>;
> > > +			txc-skew-ps = <1140>;
> > > +			txen-skew-ps = <600>;
> > > +			rxdv-skew-ps = <240>;
> > > +			rxd0-skew-ps = <420>;
> > > +			rxd1-skew-ps = <600>;
> > > +			rxd2-skew-ps = <420>;
> > > +			rxd3-skew-ps = <240>;
> > > +			txd0-skew-ps = <60>;
> > > +			txd1-skew-ps = <60>;
> > > +			txd2-skew-ps = <60>;
> > > +			txd3-skew-ps = <240>;
> > > +		};
> > > +	};
> > > +};
> > > +
> > > +&i2c1 {
> > > +	status = "okay";
> > 
> > Let 'status' be the last property.
> > 
> 
> Ok
> 
> I will repost again
> 
> Michael
> 
> > Shawn
> > 
> > > +	clock-frequency = <100000>;
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_i2c1_1>;
> > > +};
> > > +
> > > +&i2c2 {
> > > +	clock-frequency = <100000>;
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_i2c2_2>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&i2c3 {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_i2c3_4>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&pcie {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_pcie>;
> > > +	reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&ssi1 {
> > > +	fsl,mode = "i2s-slave";
> > > +	status = "okay";
> > > +};
> > > +
> > > +&uart4 {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_uart4_1>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usbh1 {
> > > +	vbus-supply = <&reg_usb_h1_vbus>;
> > > +	disable-over-current;
> > > +	clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usbotg {
> > > +	vbus-supply = <&reg_usb_otg_vbus>;
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_usbotg_2>;
> > > +	disable-over-current;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usdhc1 {
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_usdhc1_1>;
> > > +	no-1-8-v;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usdhc3 {
> > > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > +	pinctrl-0 = <&pinctrl_usdhc3_2>;
> > > +	pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > > +	pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > > +	vmcc-supply = <&reg_sd3_vmmc>;
> > > +	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > > +	bus-witdh=<4>;
> > > +	no-1-8-v;
> > > +	status = "okay";
> > > +};
> > > +
> > > +&usdhc4 {
> > > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > +	pinctrl-0 = <&pinctrl_usdhc4_1>;
> > > +	pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > > +	pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > > +	vmcc-supply = <&reg_sd4_vmmc>;
> > > +	bus-witdh=<8>;
> > > +	no-1-8-v;
> > > +	non-removable;
> > > +	status = "okay";
> > > +};
> > > -- 
> > > 2.6.3
> > > 
> > > -- 
> > > | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> > > | COO  -  Founder                                      Cruquiuskade 47 |
> > > | +31(0)851119172                                 Amsterdam 1018 AM NL |
> > > |                  [`as] http://www.amarulasolutions.com               |
> > > 
> 
> -- 
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |
Shawn Guo Dec. 21, 2015, 6:12 a.m. UTC | #7
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> Hi
> 
> I have address most of the changes but I have problem when I remove
> the group of pinctrl as you suggest
...
> > > > +&iomuxc {
> > > 
> > > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > > read.
> > > 
> > 
> > Ok
> > 
> > 
> > > > +	imx6qdl-icore-rqs {
> > > > +
> > > 
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > > 
> 
> If I save this I can not register usb. Group is not found
> 
> [    2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [    2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [    2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [    2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [    2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [    2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [    2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [    2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [    2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22

I'm not sure if you got my comment correct, but what I meant is
something like below.

&iomuxc {
       pinctrl_audmux_4: audmux-4 {
	       fsl,pins = <
		       MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
		       MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
		       MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
		       MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
	       >;
       };

       pinctrl_enet_3: enetgrp-3 {
	       fsl,pins = <
		       MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
		       MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
		       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
		       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
		       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
		       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
		       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
		       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
		       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
		       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
		       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
		       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
		       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
		       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
		       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
		       MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
	       >;
       };

       ......
};

Is this what you did?

Shawn
Shawn Guo Dec. 23, 2015, 2:27 a.m. UTC | #8
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> > > > +	imx6qdl-icore-rqs {
> > > > +
> > > 
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > > 
> 
> If I save this I can not register usb. Group is not found
> 
> [    2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [    2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [    2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [    2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [    2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [    2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [    2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [    2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [    2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22

Sorry.  I just found that to get this work on imx6q board we need to
clean up the ipu2/ipu2grp-1 group.  I just send a patch doing that with
you on copy.  Let me know if it works for you.

Shawn
Michael Nazzareno Trimarchi Dec. 23, 2015, 9:18 a.m. UTC | #9
Hi

On Wed, Dec 23, 2015 at 3:27 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
>> > > > +       imx6qdl-icore-rqs {
>> > > > +
>> > >
>> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
>> > > nodes) in place, we can now save this container.
>> > >
>>
>> If I save this I can not register usb. Group is not found
>>
>> [    2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [    2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [    2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
>> [    2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [    2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [    2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
>> [    2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [    2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [    2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
>
> Sorry.  I just found that to get this work on imx6q board we need to
> clean up the ipu2/ipu2grp-1 group.  I just send a patch doing that with
> you on copy.  Let me know if it works for you.
>

Make sense. Sorry not to fix before by myself. I will take the board
this afternoon and check it again

Michael

> Shawn
diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@  dtb-$(CONFIG_SOC_IMX6Q) += \
 	imx6q-gw551x.dtb \
 	imx6q-gw552x.dtb \
 	imx6q-hummingboard.dtb \
+	imx6q-icore-rqs.dtb \
 	imx6q-nitrogen6x.dtb \
 	imx6q-phytec-pbab01.dtb \
 	imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..8f14edf
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,45 @@ 
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+	model = "Engicam i.CoreM6 Quad SOM";
+	compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+
+	sound {
+		compatible = "fsl,imx-audio-sgtl5000";
+		model = "imx-audio-sgtl5000";
+		ssi-controller = <&ssi1>;
+		audio-codec = <&codec>;
+		audio-routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+		mux-int-port = <1>;
+		mux-ext-port = <4>;
+	};
+};
+
+&sata {
+	status = "okay";
+};
+
+&i2c3 {
+	codec: sgtl5000@0a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+		clocks = <&clks IMX6QDL_CLK_CKO>;
+		VDDA-supply = <&reg_2p5v>;
+		VDDIO-supply = <&reg_3p3v>;
+		VDDD-supply = <&reg_1p8v>;
+	};
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..c57a830
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,382 @@ 
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+	memory {
+		reg = <0x10000000 0x80000000>;
+	};
+
+	reg_1p8v: 1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "1P8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_2p5v: 2p5v {
+		compatible = "regulator-fixed";
+		regulator-name = "2P5V";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: 3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "3P3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_sd3_vmmc: sd3_vmmc {
+		compatible = "regulator-fixed";
+		regulator-name = "P3V3_SD3_SWITCHED";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+		enable-active-high;
+	};
+
+	reg_sd4_vmmc: sd4_vmmc {
+		compatible = "regulator-fixed";
+		regulator-name = "P3V3_SD4_SWITCHED";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_usb_h1_vbus: usb_h1_vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_h1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_usb_otg_vbus: usb_otg_vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	usb_hub: usb-hub {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbhub>;
+		compatible = "smsc,usb3503a";
+		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+		clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+		clock-names = "refclk";
+	};
+};
+
+&iomuxc {
+	imx6qdl-icore-rqs {
+
+		pinctrl_audmux_4: audmux-4 {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
+				MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x110b0
+				MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+				MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
+			>;
+		};
+
+		pinctrl_enet_3: enetgrp-3 {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
+			>;
+		};
+
+		pinctrl_i2c1_1: i2c1grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2_2: i2c2grp-2 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3_4: i2c3grp-4 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
+				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
+			>;
+		};
+
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059	/* PCIe Reset */
+			>;
+		};
+
+		pinctrl_uart4_1: uart4grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+			>;
+		};
+
+		pinctrl_usbhub: usbhubgrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_6__GPIO1_IO06  0x1f059	/* HUB USB Reset */
+			>;
+		};
+
+		pinctrl_usbotg_2: usbotggrp-2 {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+			>;
+		};
+
+		pinctrl_usdhc1_1: usdhc1grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
+				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+			>;
+		};
+
+		pinctrl_usdhc3_2: usdhc3grp-2 {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+				MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1f059	/* CD */
+				MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1f059	/* PWR */
+			>;
+		};
+
+		pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+			>;
+		};
+
+		pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+			>;
+		};
+
+		pinctrl_usdhc4_1: usdhc4grp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
+				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070
+				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+			>;
+		};
+
+		pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
+				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
+				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+			>;
+		};
+
+		pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
+				MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
+				MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+				MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+				MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+				MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+				MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+				MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+				MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+				MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+			>;
+		};
+	};
+};
+
+&clks {
+	assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux_4>;
+	status = "okay";
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet_3>;
+	phy-handle = <&eth_phy>;
+	phy-mode = "rgmii";
+	status = "okay";
+	mdio {
+		eth_phy: ethernet-phy {
+			rxc-skew-ps = <1140>;
+			txc-skew-ps = <1140>;
+			txen-skew-ps = <600>;
+			rxdv-skew-ps = <240>;
+			rxd0-skew-ps = <420>;
+			rxd1-skew-ps = <600>;
+			rxd2-skew-ps = <420>;
+			rxd3-skew-ps = <240>;
+			txd0-skew-ps = <60>;
+			txd1-skew-ps = <60>;
+			txd2-skew-ps = <60>;
+			txd3-skew-ps = <240>;
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_1>;
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2_2>;
+	status = "okay";
+};
+
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3_4>;
+	status = "okay";
+};
+
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&ssi1 {
+	fsl,mode = "i2s-slave";
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4_1>;
+	status = "okay";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	disable-over-current;
+	clocks = <&clks IMX6QDL_CLK_USBOH3>;
+	status = "okay";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg_2>;
+	disable-over-current;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1_1>;
+	no-1-8-v;
+	status = "okay";
+};
+
+&usdhc3 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3_2>;
+	pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+	vmcc-supply = <&reg_sd3_vmmc>;
+	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+	bus-witdh=<4>;
+	no-1-8-v;
+	status = "okay";
+};
+
+&usdhc4 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc4_1>;
+	pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+	vmcc-supply = <&reg_sd4_vmmc>;
+	bus-witdh=<8>;
+	no-1-8-v;
+	non-removable;
+	status = "okay";
+};