From patchwork Tue Nov 24 20:07:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 7692991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EFD90BF90C for ; Tue, 24 Nov 2015 20:10:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E9E342082D for ; Tue, 24 Nov 2015 20:10:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F126420830 for ; Tue, 24 Nov 2015 20:10:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a1Jse-00061p-UF; Tue, 24 Nov 2015 20:08:00 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a1Jsa-0005wh-60 for linux-arm-kernel@lists.infradead.org; Tue, 24 Nov 2015 20:07:57 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 69AF013F381; Tue, 24 Nov 2015 20:07:33 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 3714D13F397; Tue, 24 Nov 2015 20:07:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 95B7813F381; Tue, 24 Nov 2015 20:07:31 +0000 (UTC) Date: Tue, 24 Nov 2015 12:07:30 -0800 From: Stephen Boyd To: Russell King - ARM Linux Subject: Re: [RFC/PATCH 0/3] ARM: Use udiv/sdiv for __aeabi_{u}idiv library functions Message-ID: <20151124200730.GA25963@codeaurora.org> References: <1448068997-26631-1-git-send-email-sboyd@codeaurora.org> <133921941.Qfq59EaTOs@wuerfel> <20151123213206.GG19156@codeaurora.org> <6359949.bhCrxaQvmL@wuerfel> <20151124001306.GI19156@codeaurora.org> <20151124085349.GQ19156@codeaurora.org> <20151124103948.GZ8644@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20151124103948.GZ8644@n2100.arm.linux.org.uk> User-Agent: Mutt/1.5.21 (2010-09-15) X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151124_120756_457243_185A5F83 X-CRM114-Status: GOOD ( 24.54 ) X-Spam-Score: -3.2 (---) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicolas Pitre , Peter Maydell , =?iso-8859-1?Q?M=E5ns_Rullg=E5rd?= , Arnd Bergmann , "linux-arm-msm@vger.kernel.org" , Daniel Lezcano , lkml - Kernel Mailing List , Steven Rostedt , Christopher Covington , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On 11/24, Russell King - ARM Linux wrote: > On Tue, Nov 24, 2015 at 12:53:49AM -0800, Stephen Boyd wrote: > > > > And adding CPU_V7VE causes a cascade of changes to wherever > > CPU_V7 is being used today. Here's the patch I currently have, > > without the platform changes: > > @@ -1069,7 +1075,7 @@ config ARM_ERRATA_411920 > > > > config ARM_ERRATA_430973 > > bool "ARM errata: Stale prediction on replaced interworking branch" > > - depends on CPU_V7 > > + depends on CPU_V7 || CPU_V7VE > > NAK on all this. The fact that you're having to add CPU_V7VE at all > sites which have CPU_V7 shows that this is a totally broken way of > approaching this. > > Make CPU_V7VE be an _add-on_ to CPU_V7. In other words, when CPU_V7VE > is enabled, CPU_V7 should also be enabled, just like we do for CPU_V6K. > > Note that v7M is different because that's not an add-on feature, it's > a different CPU class from (what should be) v7A. > Ok. Presumably the order of arch-$(CONFIG) lines in the Makefile are done in an order to allow the build to degrade to the lowest common denominator among architecture support. CPU_V7 selects CPU_32v7 and we're using that config to select -march=armv7-a in the Makefile. The patch currently uses CPU_32v7VE to select -march=armv7ve. If CPU_V7VE selects CPU_V7 we'll never be able to use -march=armv7ve because CPU_V7 will be selecting CPU_32v7 and that will come after CPU_32v7VE in the Makefile. My understanding is that we want to support CPU_V7VE without CPU_V7 enabled so that it uses the idiv instructions in that configuration. When V7VE and V7 are both enabled, we should degrade to the aeabi functions, and the same is true for when V7VE is disabled. I suppose we can fix this by making CPU_V7 a hidden option? Or I need some coffee because I'm missing something. ---8<---- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ccd0d5553d38..158ffb983387 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -626,7 +626,7 @@ config ARCH_SHMOBILE_LEGACY select ARCH_SHMOBILE select ARM_PATCH_PHYS_VIRT if MMU select CLKDEV_LOOKUP - select CPU_V7 + select CPU_V7_NOEXT select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -802,7 +802,7 @@ config ARCH_MULTI_V7 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" default y select ARCH_MULTI_V6_V7 - select CPU_V7 + select CPU_V7_NOEXT select HAVE_SMP config ARCH_MULTI_V7VE diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 9ab8932403e5..7e1b36400e14 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -25,7 +25,7 @@ config ARCH_ATLAS7 bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" default y select ARM_GIC - select CPU_V7 + select CPU_V7_NOEXT select HAVE_ARM_SCU if SMP select HAVE_SMP help diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index 565925f37dc5..7e084c34071c 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -24,7 +24,7 @@ config MACH_REALVIEW_EB config REALVIEW_EB_A9MP bool "Support Multicore Cortex-A9 Tile" depends on MACH_REALVIEW_EB - select CPU_V7 + select CPU_V7_NOEXT select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select HAVE_SMP @@ -93,7 +93,7 @@ config REALVIEW_PB1176_SECURE_FLASH config MACH_REALVIEW_PBA8 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" select ARM_GIC - select CPU_V7 + select CPU_V7_NOEXT select HAVE_PATA_PLATFORM help Include support for the ARM(R) RealView Platform Baseboard for diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index e4ff161da98f..02a887235155 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -350,11 +350,11 @@ config CPU_FEROCEON_OLD_ID config CPU_PJ4 bool select ARM_THUMBEE - select CPU_V7 + select CPU_V7_NOEXT config CPU_PJ4B bool - select CPU_V7 + select CPU_V7_NOEXT # ARMv6 config CPU_V6 @@ -383,11 +383,9 @@ config CPU_V6K select CPU_PABRT_V6 select CPU_TLB_V6 if MMU -# ARMv7 config CPU_V7 - bool "Support ARM V7 processor" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V7) && (ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX) + bool select CPU_32v6K - select CPU_32v7 select CPU_ABRT_EV7 select CPU_CACHE_V7 select CPU_CACHE_VIPT @@ -398,6 +396,12 @@ config CPU_V7 select CPU_PABRT_V7 select CPU_TLB_V7 if MMU +# ARMv7 +config CPU_V7_NOEXT + bool "Support ARM V7 processor" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V7) && (ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX) + select CPU_32v7 + select CPU_V7 + # ARMv7M config CPU_V7M bool @@ -410,17 +414,8 @@ config CPU_V7M # ARMv7ve config CPU_V7VE bool "Support ARM V7 processor w/ virtualization extensions" if (!ARCH_MULTIPLATFORM || ARCH_MULTI_V7VE) && (ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX) - select CPU_32v6K select CPU_32v7VE - select CPU_ABRT_EV7 - select CPU_CACHE_V7 - select CPU_CACHE_VIPT - select CPU_COPY_V6 if MMU - select CPU_CP15_MMU if MMU - select CPU_CP15_MPU if !MMU - select CPU_HAS_ASID if MMU - select CPU_PABRT_V7 - select CPU_TLB_V7 if MMU + select CPU_V7 config CPU_THUMBONLY bool