From patchwork Thu Feb 4 15:25:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 8224541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2B696BEEE5 for ; Thu, 4 Feb 2016 15:37:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 427A120384 for ; Thu, 4 Feb 2016 15:37:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 48C8A201B9 for ; Thu, 4 Feb 2016 15:37:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aRLwS-000768-M0; Thu, 04 Feb 2016 15:35:32 +0000 Received: from smtp5-g21.free.fr ([2a01:e0c:1:1599::14]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aRLnP-0003Qg-3H for linux-arm-kernel@lists.infradead.org; Thu, 04 Feb 2016 15:26:43 +0000 Received: from void-opi2 (unknown [82.245.201.222]) by smtp5-g21.free.fr (Postfix) with SMTP id 47F77D48134; Thu, 4 Feb 2016 16:23:31 +0100 (CET) Date: Thu, 4 Feb 2016 16:25:45 +0100 From: Jean-Francois Moine To: Maxime Ripard Subject: Re: [PATCH v4] clk: sunxi: Refactor A31 PLL6 so that it can be reused Message-Id: <20160204162545.f806fcb64a826d2c3313985b@free.fr> In-Reply-To: <20160204120507.GC4270@lukather> References: <1454358000-13594-1-git-send-email-maxime.ripard@free-electrons.com> <20160204120507.GC4270@lukather> X-Mailer: Sylpheed 3.4.3 (GTK+ 2.24.29; armv7l-unknown-linux-gnueabihf) Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160204_072612_137265_9B2D90C7 X-CRM114-Status: GOOD ( 14.09 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vishnu Patekar , Mike Turquette , Stephen Boyd , Hans de Goede , Chen-Yu Tsai , Jens Kuske , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, 4 Feb 2016 13:05:07 +0100 Maxime Ripard wrote: > On Mon, Feb 01, 2016 at 09:20:00PM +0100, Maxime Ripard wrote: > > Remove the fixed dividers from the PLL6 driver to be able to have a > > reusable driver that can be used across several SoCs that share the same > > controller, but don't have the same set of dividers for this clock, and to > > also be reused multiple times in the same SoC, since we're droping the > > clock name. > > > > Acked-by: Chen-Yu Tsai > > Signed-off-by: Maxime Ripard > > Applied. > > Maxime I don't agree: - you changed the DTs of many SoCs without any valid reason, - you complexified the treatment of the pll6 in clk-sunxi.c while defining a x2 rate instead of the single rate would also work for the other pll periphs (pll8). Here is a simpler patch: --- a/arch/arm/boot/dts/sun8i-h3.dtsi 2016-02-01 08:24:06.179396522 +0100 +++ b/arch/arm/boot/dts/sun8i-h3.dtsi 2016-02-04 16:18:05.911509291 +0100 @@ -137,12 +137,23 @@ clock-output-names = "pll6d2"; }; - /* dummy clock until pll6 can be reused */ + pll8x2: clk@01c20044 { /* PLL_PERIPH1 */ + #clock-cells = <0>; + compatible = "allwinner,pll-periphx2-clk"; + reg = <0x01c20044 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll8x2"; + }; + pll8: pll8_clk { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <1>; + compatible = "fixed-factor-clock"; + clock-div = <2>; + clock-mult = <1>; + clocks = <&pll8x2>; clock-output-names = "pll8"; + assigned-clocks = <&pll8x2>; + assigned-clock-rates = <1200000000>; }; cpu: cpu_clk@01c20050 { --- a/drivers/clk/sunxi/clk-sunxi.c 2016-02-01 08:24:06.199396132 +0100 +++ b/drivers/clk/sunxi/clk-sunxi.c 2016-02-04 16:03:41.056322804 +0100 @@ -714,6 +714,12 @@ .name = "pll6", }; +static const struct factors_data pll_periphx2_data __initconst = { + .enable = 31, + .table = &sun6i_a31_pll6_config, + .getter = sun6i_a31_get_pll6_factors, +}; + static const struct factors_data sun6i_a31_pll6_data __initconst = { .enable = 31, .table = &sun6i_a31_pll6_config, @@ -1110,6 +1116,7 @@ {.compatible = "allwinner,sun5i-a13-ahb-clk", .data = &sun5i_a13_ahb_data,}, {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, + {.compatible = "allwinner,pll-periphx2-clk", .data = &pll_periphx2_data,}, {} };