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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id j6sm51020430paa.44.2016.10.17.18.56.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Oct 2016 18:56:54 -0700 (PDT) From: Stephen Boyd To: linux-usb@vger.kernel.org Subject: [PATCH v5 14/23] usb: chipidea: msm: Use hw_write_id_reg() instead of writel Date: Mon, 17 Oct 2016 18:56:27 -0700 Message-Id: <20161018015636.11701-15-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20161018015636.11701-1-stephen.boyd@linaro.org> References: <20161018015636.11701-1-stephen.boyd@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161017_185713_175962_058F8A9C X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Felipe Balbi , Arnd Bergmann , Neil Armstrong , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Peter Chen , Greg Kroah-Hartman , Andy Gross , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The MSM_USB_BASE macro trick is not very clear, and we're using it for only one register write so let's just move to using hw_write_id_reg() and passing the ci pointer instead. That clearly shows what offset we're using and avoids needing to include the msm_hsusb_hw.h file when we're going to delete that file soon. Acked-by: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd --- drivers/usb/chipidea/ci_hdrc_msm.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c index 719b20caf88e..b282a717bf8c 100644 --- a/drivers/usb/chipidea/ci_hdrc_msm.c +++ b/drivers/usb/chipidea/ci_hdrc_msm.c @@ -8,14 +8,12 @@ #include #include #include -#include -#include #include #include #include "ci.h" -#define MSM_USB_BASE (ci->hw_bank.abs) +#define HS_PHY_AHB_MODE 0x0098 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) { @@ -25,7 +23,7 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) case CI_HDRC_CONTROLLER_RESET_EVENT: dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); /* use AHB transactor, allow posted data writes */ - writel(0x8, USB_AHBMODE); + hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8); usb_phy_init(ci->usb_phy); break; case CI_HDRC_CONTROLLER_STOPPED_EVENT: