From patchwork Tue Oct 18 01:56:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 9381183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CB7EC60487 for ; Tue, 18 Oct 2016 02:19:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BB51428DC0 for ; Tue, 18 Oct 2016 02:19:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AF6CE28E34; Tue, 18 Oct 2016 02:19:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5C96528DC0 for ; Tue, 18 Oct 2016 02:19:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bwJyC-0006Ps-Tr; Tue, 18 Oct 2016 02:17:36 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bwJxT-0005zQ-0D for linux-arm-kernel@bombadil.infradead.org; Tue, 18 Oct 2016 02:16:51 +0000 Received: from mail-pf0-x231.google.com ([2607:f8b0:400e:c00::231]) by casper.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bwJeZ-0003xZ-3n for linux-arm-kernel@lists.infradead.org; Tue, 18 Oct 2016 01:57:20 +0000 Received: by mail-pf0-x231.google.com with SMTP id s8so85942609pfj.2 for ; Mon, 17 Oct 2016 18:56:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=imeo0Iv0kRHBn81idNZlqJUUzuuhUtRnn1Q2qeymGtI=; b=UICL+59PyjidxgdbnA/9mWJL109d4edfGNA3EGdmgCyRMdpNLju9yYVsOKL3ipgKNy oR/tcOr+LdwCeq4Wal3G8/RzlwXxqGbagbJG5cQw5LE3kGNpPY9vGYtSZ/ulNets86wB +5Sf9qinZdAA5uiqjqO8eKLK05J3wc0Uh/QA8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=imeo0Iv0kRHBn81idNZlqJUUzuuhUtRnn1Q2qeymGtI=; b=I/qeFxD/ykvRWgNlsoK5eAS45+WKM6MXl/v/Z+SjLoW/Ku8/ATl6b846mynUepymYo zemLnsLsFF0SusMAMYUFpsC1rj+9yaME93yCJmqW/gqE5eeGclieQuqL5HAtuc22Q28k fjHL35lzSnUZNklCbjJcshqiSlxpeeFfKnS7dDu05GnjEer5+jZOol50psunimo82JjP y6eN73eCeVV7V5+GZ9Gx5Vn9q4CE3bxWjOL+FeM7pyxW7jWhRoIL+09GkAHN0j/0uLzz F3vOnOl7iehvGP6XBxGydTiEedna87PdwgGjeTJOasEF5tcWW25kg2rQhhXnnVUYVqLI aIjQ== X-Gm-Message-State: AA6/9RlgSegIqam7ul6TYZlA6hCjZYSNbISgicpitKYE1GN8SXUljmScVJjlqTAT6OZU+T/Q X-Received: by 10.98.149.74 with SMTP id p71mr700490pfd.126.1476755816970; Mon, 17 Oct 2016 18:56:56 -0700 (PDT) Received: from localhost.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id j6sm51020430paa.44.2016.10.17.18.56.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Oct 2016 18:56:56 -0700 (PDT) From: Stephen Boyd To: linux-usb@vger.kernel.org Subject: [PATCH v5 16/23] usb: chipidea: msm: Mux over secondary phy at the right time Date: Mon, 17 Oct 2016 18:56:29 -0700 Message-Id: <20161018015636.11701-17-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20161018015636.11701-1-stephen.boyd@linaro.org> References: <20161018015636.11701-1-stephen.boyd@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161018_025719_331176_A621066C X-CRM114-Status: GOOD ( 22.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Felipe Balbi , Arnd Bergmann , Neil Armstrong , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Peter Chen , Greg Kroah-Hartman , Andy Gross , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We need to pick the correct phy at runtime based on how the SoC has been wired onto the board. If the secondary phy is used, take it out of reset and mux over to it by writing into the TCSR register. Make sure to do this on reset too, because this register is reset to the default value (primary phy) after the RESET bit is set in USBCMD. Acked-by: Peter Chen Cc: Greg Kroah-Hartman Signed-off-by: Stephen Boyd --- drivers/usb/chipidea/ci_hdrc_msm.c | 62 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c index 7e870a253f55..4b0aadc2be2f 100644 --- a/drivers/usb/chipidea/ci_hdrc_msm.c +++ b/drivers/usb/chipidea/ci_hdrc_msm.c @@ -8,29 +8,44 @@ #include #include #include -#include #include #include #include +#include +#include +#include #include "ci.h" #define HS_PHY_AHB_MODE 0x0098 +/* Vendor base starts at 0x200 beyond CI base */ +#define HS_PHY_SEC_CTRL 0x0078 +#define HS_PHY_DIG_CLAMP_N BIT(16) + struct ci_hdrc_msm { struct platform_device *ci; struct clk *core_clk; struct clk *iface_clk; struct clk *fs_clk; + bool secondary_phy; + void __iomem *base; }; static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) { - struct device *dev = ci->gadget.dev.parent; + struct device *dev = ci->dev->parent; + struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev); switch (event) { case CI_HDRC_CONTROLLER_RESET_EVENT: dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); + if (msm_ci->secondary_phy) { + u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL); + val |= HS_PHY_DIG_CLAMP_N; + writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL); + } + /* use AHB transactor, allow posted data writes */ hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8); usb_phy_init(ci->usb_phy); @@ -59,6 +74,39 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = { .notify_event = ci_hdrc_msm_notify_event, }; +static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci, + struct platform_device *pdev) +{ + struct regmap *regmap; + struct device *dev = &pdev->dev; + struct of_phandle_args args; + u32 val; + int ret; + + ret = of_parse_phandle_with_fixed_args(dev->of_node, "phy-select", 2, 0, + &args); + if (ret) + return 0; + + regmap = syscon_node_to_regmap(args.np); + of_node_put(args.np); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_write(regmap, args.args[0], args.args[1]); + if (ret) + return ret; + + ci->secondary_phy = !!args.args[1]; + if (ci->secondary_phy) { + val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL); + val |= HS_PHY_DIG_CLAMP_N; + writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL); + } + + return 0; +} + static int ci_hdrc_msm_probe(struct platform_device *pdev) { struct ci_hdrc_msm *ci; @@ -66,6 +114,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) struct usb_phy *phy; struct clk *clk; struct reset_control *reset; + struct resource *res; int ret; dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n"); @@ -105,6 +154,11 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) ci->fs_clk = NULL; } + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + ci->base = devm_ioremap_resource(&pdev->dev, res); + if (!ci->base) + return -ENOMEM; + ret = clk_prepare_enable(ci->fs_clk); if (ret) return ret; @@ -123,6 +177,10 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev) if (ret) goto err_iface; + ret = ci_hdrc_msm_mux_phy(ci, pdev); + if (ret) + goto err_mux; + plat_ci = ci_hdrc_add_device(&pdev->dev, pdev->resource, pdev->num_resources, &ci_hdrc_msm_platdata);