From patchwork Wed Oct 26 17:41:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Punit Agrawal X-Patchwork-Id: 9397965 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5A4E9600BA for ; Wed, 26 Oct 2016 17:47:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EC311285B8 for ; Wed, 26 Oct 2016 17:47:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E10AF28C82; Wed, 26 Oct 2016 17:47:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8903B285B8 for ; Wed, 26 Oct 2016 17:47:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bzSGg-0001C3-0e; Wed, 26 Oct 2016 17:45:38 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bzSEL-0006e9-6E for linux-arm-kernel@lists.infradead.org; Wed, 26 Oct 2016 17:43:15 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 385991529; Wed, 26 Oct 2016 10:42:55 -0700 (PDT) Received: from localhost (e105922-lin.cambridge.arm.com [10.1.195.25]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 099493F487; Wed, 26 Oct 2016 10:42:55 -0700 (PDT) From: Punit Agrawal To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 8/8] KVM: arm/arm64: Enable selective trapping of TLB instructions Date: Wed, 26 Oct 2016 18:41:48 +0100 Message-Id: <20161026174148.17172-9-punit.agrawal@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161026174148.17172-1-punit.agrawal@arm.com> References: <20161026174148.17172-1-punit.agrawal@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161026_104313_518263_BA95CFD4 X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Punit Agrawal , Will Deacon , Steven Rostedt , Ingo Molnar , Christoffer Dall MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The TTLB bit of Hypervisor Control Register controls the trapping of guest TLB maintenance instructions. Taking the trap requires a switch to the hypervisor and is an expensive operation. Enable selective trapping of guest TLB instructions when the associated perf trace event is enabled for a specific virtual machine. Signed-off-by: Punit Agrawal Cc: Christoffer Dall Cc: Marc Zyngier --- virt/kvm/arm/perf_trace.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/virt/kvm/arm/perf_trace.c b/virt/kvm/arm/perf_trace.c index 1cafbc9..649ca55 100644 --- a/virt/kvm/arm/perf_trace.c +++ b/virt/kvm/arm/perf_trace.c @@ -17,6 +17,8 @@ #include #include +#include + typedef int (*perf_trace_callback_fn)(struct kvm *kvm, bool enable); struct kvm_trace_hook { @@ -24,7 +26,37 @@ struct kvm_trace_hook { perf_trace_callback_fn setup_fn; }; +static int tlb_invalidate_trap(struct kvm *kvm, bool enable) +{ + int i; + struct kvm_vcpu *vcpu; + + /* + * Halt the VM to ensure atomic update across all vcpus (this + * avoids racy behaviour against other modifications of + * HCR_EL2 such as kvm_toggle_cache/kvm_set_way_flush). + */ + kvm_arm_halt_guest(kvm); + kvm_for_each_vcpu(i, vcpu, kvm) { + unsigned long hcr = vcpu_get_hcr(vcpu); + + if (enable) + hcr |= HCR_TTLB; + else + hcr &= ~HCR_TTLB; + + vcpu_set_hcr(vcpu, hcr); + } + kvm_arm_resume_guest(kvm); + + return 0; +} + static struct kvm_trace_hook trace_hook[] = { + { + .key = "kvm_tlb_invalidate", + .setup_fn = tlb_invalidate_trap, + }, { }, };