@@ -1,11 +1,18 @@
#ifndef __ASM_ARM_IRQ_WORK_H
#define __ASM_ARM_IRQ_WORK_H
-#include <asm/smp_plat.h>
+extern bool irq_controller_can_ipi;
+#define irq_controller_can_ipi irq_controller_can_ipi
static inline bool arch_irq_work_has_interrupt(void)
{
- return cpu_smp();
+#ifdef CONFIG_SMP
+ /* This depends on the IRQ controller */
+ return irq_controller_can_ipi;
+#else
+ /* The kernel is not built to support IPIs */
+ return false;
+#endif
}
#endif /* _ASM_ARM_IRQ_WORK_H */
@@ -473,6 +473,9 @@ void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
__smp_cross_call = fn;
}
+/* This indicates whether the IRQ controller can IPI (including self-IPI) */
+bool irq_controller_can_ipi;
+
static const char *ipi_types[NR_IPI] __tracepoint_string = {
#define S(x,s) [x] = s
S(IPI_WAKEUP, "CPU wakeup interrupts"),
@@ -1187,9 +1187,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
*/
for (i = 0; i < NR_GIC_CPU_IF; i++)
gic_cpu_map[i] = 0xff;
-#ifdef CONFIG_SMP
- set_smp_cross_call(gic_raise_softirq);
-#endif
cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_GIC_STARTING,
"AP_IRQ_GIC_STARTING",
gic_starting_cpu, NULL);
@@ -1207,8 +1204,20 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
}
ret = gic_init_bases(gic, irq_start, handle);
- if (ret)
+ if (ret) {
kfree(name);
+ return ret;
+ }
+
+ if (gic == &gic_data[0]) {
+#ifdef CONFIG_SMP
+ set_smp_cross_call(gic_raise_softirq);
+#ifdef irq_controller_can_ipi
+ if (nr_cpu_ids == 1 || hweight8(gic_cpu_map[0]) == 1)
+ irq_controller_can_ipi = true;
+#endif
+#endif
+ }
return ret;
}
Following on from the previous patch, I think this makes more sense to determine whether we can support IRQ work interrupts. Whether we can support them or not depends on two things: (a) whether the kernel has support for receiving IPIs (b) whether it's possible to send an IPI to CPUs including the raising CPU. (a) is a function of how the kernel is built - and in the case of ARM, it depends whether the kernel is built with SMP enabled or not. (b) is a property of the interrupt controller. It hasn't ever been a function of the CPU or architecture. Commit 059e232089e4 ("irqchip/gic: Allow self-SGIs for SMP on UP configurations") changes the GIC IPI code such that we can raise SGIs on uniprocessor systems running on a SMP kernel, which means we can support IRQ work interrupts here as well. So, we shouldn't be using cpu_smp() (or its previous is_smp() here at all. Use a flag to indicate whether we can IPI and use that to indicate whether we support irq work interrupts. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> --- arch/arm/include/asm/irq_work.h | 11 +++++++++-- arch/arm/kernel/irq.c | 0 arch/arm/kernel/smp.c | 3 +++ drivers/irqchip/irq-gic.c | 17 +++++++++++++---- 4 files changed, 25 insertions(+), 6 deletions(-)