From patchwork Wed Jan 18 13:25:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fu.wei@linaro.org X-Patchwork-Id: 9523833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B33786020A for ; Wed, 18 Jan 2017 13:32:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9949B284CD for ; Wed, 18 Jan 2017 13:32:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8D937285AA; Wed, 18 Jan 2017 13:32:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4102A284CD for ; Wed, 18 Jan 2017 13:32:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cTqLa-0003n2-V1; Wed, 18 Jan 2017 13:32:18 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cTqHH-0007Qa-NW for linux-arm-kernel@lists.infradead.org; Wed, 18 Jan 2017 13:27:54 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E37DC6B6AF; Wed, 18 Jan 2017 13:27:32 +0000 (UTC) Received: from Rei-Ayanami.localdomain (vpn1-6-23.pek2.redhat.com [10.72.6.23]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v0IDPrWm011402; Wed, 18 Jan 2017 08:27:22 -0500 From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Subject: [PATCH v20 08/17] clocksource/drivers/arm_arch_timer: Rework counter frequency detection. Date: Wed, 18 Jan 2017 21:25:32 +0800 Message-Id: <20170118132541.8989-9-fu.wei@linaro.org> In-Reply-To: <20170118132541.8989-1-fu.wei@linaro.org> References: <20170118132541.8989-1-fu.wei@linaro.org> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 18 Jan 2017 13:27:33 +0000 (UTC) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170118_052751_887299_B66DDB78 X-CRM114-Status: GOOD ( 14.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-acpi@lists.linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, wim@iguana.be, Fu Wei , wei@redhat.com, al.stone@linaro.org, tn@semihalf.com, timur@codeaurora.org, linux-acpi@vger.kernel.org, linux@roeck-us.net, harba@codeaurora.org, julien.grall@arm.com, linux-watchdog@vger.kernel.org, arnd@arndb.de, jcm@redhat.com, cov@codeaurora.org, linux-arm-kernel@lists.infradead.org, graeme.gregory@linaro.org, rruigrok@codeaurora.org, leo.duran@amd.com, Suravee.Suthikulpanit@amd.com, christoffer.dall@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fu Wei The counter frequency detection call(arch_timer_detect_rate) combines two ways to get counter frequency: system coprocessor register and MMIO timer. But in a specific timer init code, we only need one way to try: getting frequency from MMIO timer register will be needed only when we init MMIO timer; getting frequency from system coprocessor register will be needed only when we init arch timer. This patch separates paths to determine frequency: Separate out the MMIO frequency and the sysreg frequency detection call, and use the appropriate one for the counter. Signed-off-by: Fu Wei --- drivers/clocksource/arm_arch_timer.c | 40 ++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 6484f84..9482481 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -488,23 +488,33 @@ static int arch_timer_starting_cpu(unsigned int cpu) return 0; } -static void arch_timer_detect_rate(void __iomem *cntbase) +static void __arch_timer_determine_rate(u32 rate) { - /* Who has more than one independent system counter? */ - if (arch_timer_rate) - return; + /* Check the timer frequency. */ + if (!arch_timer_rate) { + if (rate) + arch_timer_rate = rate; + else + pr_warn("frequency not available\n"); + } else if (rate && arch_timer_rate != rate) { + pr_warn("got different frequency, keep original.\n"); + } +} +static void arch_timer_detect_rate(void) +{ /* - * Try to determine the frequency from the MMIO timer or the sysreg. + * Try to get the timer frequency from the sysreg CNTFRQ. */ - if (cntbase) - arch_timer_rate = readl_relaxed(cntbase + CNTFRQ); - else - arch_timer_rate = arch_timer_get_cntfrq(); + __arch_timer_determine_rate(arch_timer_get_cntfrq()); +} - /* Check the timer frequency. */ - if (arch_timer_rate == 0) - pr_warn("frequency not available\n"); +static void arch_timer_mem_detect_rate(void __iomem *cntbase) +{ + /* + * Try to get the timer frequency from the CNTFRQ reg of MMIO timer. + */ + __arch_timer_determine_rate(readl_relaxed(cntbase + CNTFRQ)); } static void arch_timer_banner(unsigned type) @@ -887,7 +897,7 @@ static int __init arch_timer_of_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_detect_rate(NULL); + arch_timer_detect_rate(); arch_timer_c3stop = !of_property_read_bool(np, "always-on"); @@ -1001,7 +1011,7 @@ static int __init arch_timer_mem_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_detect_rate(base); + arch_timer_mem_detect_rate(base); ret = arch_timer_mem_register(base, irq); if (ret) @@ -1064,7 +1074,7 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) gtdt->non_secure_el2_flags); /* Get the frequency from the sysreg CNTFRQ */ - arch_timer_detect_rate(NULL); + arch_timer_detect_rate(); arch_timer_uses_ppi = arch_timer_select_ppi(); if (!arch_timer_ppi[arch_timer_uses_ppi]) {