From patchwork Fri Jan 27 00:47:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 9540443 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 83124601D7 for ; Fri, 27 Jan 2017 00:50:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F826282F5 for ; Fri, 27 Jan 2017 00:50:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 62E7328306; Fri, 27 Jan 2017 00:50:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, T_DKIM_INVALID autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 05B5C282F5 for ; Fri, 27 Jan 2017 00:50:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cWukb-00050C-1v; Fri, 27 Jan 2017 00:50:49 +0000 Received: from mail-pg0-f44.google.com ([74.125.83.44]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cWuil-0002nT-6w for linux-arm-kernel@lists.infradead.org; Fri, 27 Jan 2017 00:48:56 +0000 Received: by mail-pg0-f44.google.com with SMTP id 194so76521908pgd.2 for ; Thu, 26 Jan 2017 16:48:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Tp5heG8OulA/yAygqou6KLq6ZaYqHZBwtlkCT20S5H8=; b=FdQH9k92c11gr4PUpALj+MFyEcFEYYmJeoMSgyPErRtlEZLlY8/jrpkAsOvLnuqA38 JMX6g1KKBreMiBp6hqhUyHDYHA1d9WABXgZf5Dy3KgXAEHll0rFgpIJKG69cEETFLqGm plT5dqwp/I6/Ways5oM8KrnoPzaRkRJvneRAw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Tp5heG8OulA/yAygqou6KLq6ZaYqHZBwtlkCT20S5H8=; b=UJkYh0VhvlUCQuVx+/zZcdLYkuzB2OAHI1drrQv6h/E62lI2sQx4Vdrc6rVX6jQtfS 4nNqh50FY9sjQvtZfSxXEZAQDLfkTZYCu9KoUX9l2hDYouL70tfJWjA95SCuwJAznMA2 om5q4eSH4qJjVG+qHuWcUeMmSyseVQAcT27A7tVy5nES5ODWi5iR8Kqd+im3dLBOifRD 9MYkySbB70NwUlfrSaDXmsAZJhxbWiz6l21XI8egRJL9KoJA9c2Zbu+fj/2w9/j43IBn vdHqgHNi4OmyuZ0LMtNP+WSYbcZEiTma8Gew3BzlPYRHtIR4hiZ7ezsAUzL0hEmw06Tq GMag== X-Gm-Message-State: AIkVDXLHuISu1UIsntGrkGndXAo0bal0fvTgnFbzSahvEODRlfr85UEtmgb0XqQ6L24xd5lu X-Received: by 10.84.133.163 with SMTP id f32mr8154920plf.64.1485478054461; Thu, 26 Jan 2017 16:47:34 -0800 (PST) Received: from localhost.localdomain (ip68-101-172-78.sd.sd.cox.net. [68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:33 -0800 (PST) From: Stephen Boyd To: Andy Gross Subject: [PATCH 3/5] ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms Date: Thu, 26 Jan 2017 16:47:26 -0800 Message-Id: <20170127004728.22490-4-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170126_164855_282937_F086AA59 X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This USB controller has two phys, so add them both underneath the ULPI bus, but only enable one of them based on the board configuration. To get OTG to work, we need to add the id and vbus detection info and also populate the regulators for the vbus supply. Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 20 +++++++++++ arch/arm/boot/dts/qcom-msm8974.dtsi | 49 ++++++++++++++++++++++++++ arch/arm/boot/dts/qcom-pm8941.dtsi | 32 ++++++++++++++++- 3 files changed, 100 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index e9ee6dbf81fb..42a95a086c0f 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -57,6 +57,26 @@ }; }; + usb@f9a55000 { + status = "ok"; + phys = <&usb_hs2_phy>; + phy-select = <&tcsr 0xb000 1>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + hnp-disable; + srp-disable; + adp-disable; + ulpi { + phy@b { + status = "ok"; + v3p3-supply = <&pm8941_l24>; + v1p8-supply = <&pm8941_l6>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; + }; + }; + }; + pinctrl@fd510000 { i2c11_pins: i2c11 { mux { diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 6c167c031368..c714c673ea0c 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -511,6 +511,11 @@ reg = <0xfc400000 0x4000>; }; + tcsr: syscon@fd4a0000 { + compatible = "syscon"; + reg = <0xfd4a0000 0x10000>; + }; + tcsr_mutex_block: syscon@fd484000 { compatible = "syscon"; reg = <0xfd484000 0x2000>; @@ -618,6 +623,50 @@ }; }; + otg: usb@f9a55000 { + compatible = "qcom,ci-hdrc"; + reg = <0xf9a55000 0x200>, + <0xf9a55200 0x200>; + interrupts = ; + clocks = <&gcc GCC_USB_HS_AHB_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <75000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy@a { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + status = "disabled"; + }; + + usb_hs2_phy: phy@b { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>; + reset-names = "phy", "por"; + status = "disabled"; + }; + }; + }; + rng@f9bff000 { compatible = "qcom,prng"; reg = <0xf9bff000 0x200>; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 6b16b296f0fa..3fc9f34f45bb 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -26,7 +26,14 @@ bias-pull-up; }; - charger@1000 { + usb_id: misc@900 { + compatible = "qcom,pm8941-misc"; + reg = <0x900>; + interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "usb_id"; + }; + + smbb: charger@1000 { compatible = "qcom,pm8941-charger"; reg = <0x1000>; interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>, @@ -175,5 +182,28 @@ status = "disabled"; }; + + regulators { + compatible = "qcom,pm8941-regulators"; + interrupts = <0x1 0x83 0x2 0>, <0x1 0x84 0x2 0>; + interrupt-names = "ocp-5vs1", "ocp-5vs2"; + vin_5vs-supply = <&pm8941_5v>; + + pm8941_5v: s4 { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-enable-ramp-delay = <500>; + }; + + pm8941_5vs1: 5vs1 { + regulator-enable-ramp-delay = <1000>; + regulator-pull-down; + regulator-over-current-protection; + qcom,ocp-max-retries = <10>; + qcom,ocp-retry-delay = <30>; + qcom,vs-soft-start-strength = <0>; + regulator-initial-mode = <1>; + }; + }; }; };