Message ID | 20170228063535.32069-20-afaerber@suse.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Feb 28, 2017 at 07:35:29AM +0100, Andreas Färber wrote: > The Actions Semi S500 SoC requires a special secondary CPU boot procedure. > > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > v3: new > > Documentation/devicetree/bindings/arm/cpus.txt | 1 + > 1 file changed, 1 insertion(+) Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 698ad1f0..e3e1e2f 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -192,6 +192,7 @@ nodes to be present and contain the properties described below. "spin-table" # On ARM 32-bit systems this property is optional and can be one of: + "actions,s500-smp" "allwinner,sun6i-a31" "allwinner,sun8i-a23" "arm,realview-smp"
The Actions Semi S500 SoC requires a special secondary CPU boot procedure. Signed-off-by: Andreas Färber <afaerber@suse.de> --- v3: new Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+)