From patchwork Thu Mar 23 12:34:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 9640959 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B1A7602D6 for ; Thu, 23 Mar 2017 12:35:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EDD6284D5 for ; Thu, 23 Mar 2017 12:35:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4310D284E8; Thu, 23 Mar 2017 12:35:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0CC5A284D5 for ; Thu, 23 Mar 2017 12:35:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=fPUDg6ZVoMcn0OTdiMvqQQZgTt34BPVgyAxHXzpnC5M=; b=qqt wFnSdAlpU1+bEE+i+IycszMlOXyEUeT9ymSw/Ztb+OivXp5684M4RctgLQcCBxZ9j97IL3vL4qX8m zlb/27XVtqQOzn0tPUIMNtag7FsSbgoGthUziOtLZIXy/kRL48RumPlGpQ9DrFv+RljkXY5YODy0F wJLAe/yMVAwbmp6igeaLlnU3o2HXmWqeX6UnC6HP0OiqBcpHtckGK2HpMIqf+85jyYGXrEm+XYNWO Bu3jFhnO/mBq6m7IoPirYzxSXx1I3ejonfHv8zzAgE7Uircw365uBebKn0LATI66TZm0/h2RpfS7x S+1cqpCyUdX9tDmUZ0372ZlTHaaY2fA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cr1xH-00058H-BT; Thu, 23 Mar 2017 12:35:03 +0000 Received: from mx2.mailbox.org ([80.241.60.215]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cr1xD-0004ou-FQ for linux-arm-kernel@lists.infradead.org; Thu, 23 Mar 2017 12:35:02 +0000 Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx2.mailbox.org (Postfix) with ESMTPS id 4688C44E9B; Thu, 23 Mar 2017 13:34:33 +0100 (CET) X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter01.heinlein-hosting.de (spamfilter01.heinlein-hosting.de [80.241.56.115]) (amavisd-new, port 10030) with ESMTP id aEVd8pHteo6O; Thu, 23 Mar 2017 13:34:30 +0100 (CET) From: Stefan Roese To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] irqchip/armada-370-xp: Correctly align bits in 'msi_used' bitmap (multi-MSI) Date: Thu, 23 Mar 2017 13:34:29 +0100 Message-Id: <20170323123429.11145-1-sr@denx.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170323_053459_729695_1CD9099C X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Petazzoni , Gregory CLEMENT , Thomas Gleixner , Jason Cooper MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Testing on an Armada XP platform has shown, that requesting 4 MSI vectors may lead to a MSI message data value of 0x0f15 on a PCIe device supporting 4 MSI vectors. This MSI message data register needs to be aligned to power-of-2 of the supported vector count [1]. The result from this setup was, that 0x0f14 has been written into this data register and therefore not all interrupt vectors were available, or even worse, an incorrect (off by one) IRQ was trigger by the PCIe device. This patch now fixes this issue by making sure, that the bits are correctly aligned in the 'msi_used' bitmap. Resulting in the example from above in a MSI message data value of 0x0f18. [1] PCI Local Bus Spec: 6.8.1.6 Signed-off-by: Stefan Roese Cc: Thomas Petazzoni Cc: Gregory CLEMENT Cc: Jason Cooper Cc: Thomas Gleixner --- drivers/irqchip/irq-armada-370-xp.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index eb0d4d41b156..793862978f19 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -151,11 +151,24 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { int hwirq, i; + int nr_irqs_pow2; + + /* + * Round number of requested irqs up to next power of 2. This is + * needed since the MSI message data register in the configuration + * space is only allowed to have the low order bits changed for + * multi MSI vectors. This result will be used to allocated the + * bits in the "msi_used" bitmap for the hwirq vectors, this time + * aligned to "nr_irqs_pow2". + * + * Please look at PCI Local Bus Spec: 6.8.1.6 for further details. + */ + nr_irqs_pow2 = 1 << fls(nr_irqs - 1); mutex_lock(&msi_used_lock); hwirq = bitmap_find_next_zero_area(msi_used, PCI_MSI_DOORBELL_NR, - 0, nr_irqs, 0); + 0, nr_irqs, nr_irqs_pow2 - 1); if (hwirq >= PCI_MSI_DOORBELL_NR) { mutex_unlock(&msi_used_lock); return -ENOSPC;