Message ID | 20170405090634.4649-7-quentin.schulz@free-electrons.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, Apr 05, 2017 at 11:06:32AM +0200, Quentin Schulz wrote: > This adds CPU thermal throttling for the Allwinner A33. It uses the > thermal sensor present in the SoC's GPADC. > > Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> > --- > > v3: > - switched to new phandle because of modified DT node name for the GPADC > (named THS), > - got rid of cooling-min-level and cooling-max-level as it's not used in any > code in the kernel, > > v2: > - updated cooling-max-level to reflect newly added OPPs, > > arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi > index 9734e63..b88c107 100644 > --- a/arch/arm/boot/dts/sun8i-a33.dtsi > +++ b/arch/arm/boot/dts/sun8i-a33.dtsi > @@ -43,6 +43,7 @@ > */ > > #include "sun8i-a23-a33.dtsi" > +#include <dt-bindings/thermal/thermal.h> > > / { > cpu0_opp_table: opp_table0 { > @@ -127,6 +128,7 @@ > clocks = <&ccu CLK_CPUX>; > clock-names = "cpu"; > operating-points-v2 = <&cpu0_opp_table>; > + #cooling-cells = <2>; > }; > > cpu@1 { > @@ -170,6 +172,49 @@ > }; > }; > > + thermal-zones { > + cpu_thermal { > + /* milliseconds */ > + polling-delay-passive = <250>; > + polling-delay = <1000>; > + thermal-sensors = <&ths>; > + > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + map1 { > + trip = <&cpu_alert1>; > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + > + trips { > + cpu_alert0: cpu_alert0 { > + /* milliCelsius */ > + temperature = <75000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu_alert1: cpu_alert1 { > + /* milliCelsius */ > + temperature = <90000>; > + hysteresis = <2000>; > + type = "hot"; > + }; > + > + cpu_crit: cpu_crit { > + /* milliCelsius */ > + temperature = <110000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + }; > + }; > + This wasn't sorted properly (thermal is not between mali- and memory in the alphabetical order). Fixed and applied, thanks! Maxime
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 9734e63..b88c107 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -43,6 +43,7 @@ */ #include "sun8i-a23-a33.dtsi" +#include <dt-bindings/thermal/thermal.h> / { cpu0_opp_table: opp_table0 { @@ -127,6 +128,7 @@ clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@1 { @@ -170,6 +172,49 @@ }; }; + thermal-zones { + cpu_thermal { + /* milliseconds */ + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&ths>; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_alert1: cpu_alert1 { + /* milliCelsius */ + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + memory { reg = <0x40000000 0x80000000>; };
This adds CPU thermal throttling for the Allwinner A33. It uses the thermal sensor present in the SoC's GPADC. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> --- v3: - switched to new phandle because of modified DT node name for the GPADC (named THS), - got rid of cooling-min-level and cooling-max-level as it's not used in any code in the kernel, v2: - updated cooling-max-level to reflect newly added OPPs, arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+)