From patchwork Wed Apr 19 08:46:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 9687047 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8A79D602DC for ; Wed, 19 Apr 2017 08:46:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A56428403 for ; Wed, 19 Apr 2017 08:46:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6C25B28405; Wed, 19 Apr 2017 08:46:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9E07228403 for ; Wed, 19 Apr 2017 08:46:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=jpQlugBgHRMalRD4FUbUNMPQwypVjSt+bnKyEU/KChU=; b=TVVyvqmTKnR3Tp D/H7YOjVwme2VRPhswI825u2isZEYz+3yfI5/RC0HtU/a/LJGU30KAe0EO8uv1Rjmx4Ujwp8tp3t1 uOmmrk6DXGcr/hYBiF5rZLDjaPd7eeIgX9z/FhOtigtAyaZrOa0vjfX1+30qOg4FcyT2T8vynREar TLX7n54j3aFufOHKP9j4Q2NXHzxXCmYO1xoYaygfMf8IQZAQRmAmrxP3awjahuqJ01Fzar1eZzjyR XOZ/xAf4LdHo+ELYt/wjgqnPD3Ro8NhvPTGhE7BlJzcLx74g1Vs1tuFPUlj/YGJVr/xNMdDhQXPuI PApNhrgrdSB8AWIn7Krw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d0lG0-0005oz-On; Wed, 19 Apr 2017 08:46:36 +0000 Received: from eusmtp01.atmel.com ([212.144.249.242]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d0lFw-0005nV-ER for linux-arm-kernel@lists.infradead.org; Wed, 19 Apr 2017 08:46:34 +0000 Received: from apsmtp01.atmel.com (10.168.254.30) by eusmtp01.atmel.com (10.145.145.30) with Microsoft SMTP Server id 14.3.235.1; Wed, 19 Apr 2017 10:46:09 +0200 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server id 14.3.235.1; Wed, 19 Apr 2017 16:51:43 +0800 From: Wenyou Yang To: , Alexandre Belloni , Rob Herring , Pawel Moll , Mark Rutland , "Ian Campbell" , Kumar Gala , Russell King Subject: [PATCH v2] ARM: dts: at91: sama5d2: add m_can nodes Date: Wed, 19 Apr 2017 16:46:06 +0800 Message-ID: <20170419084606.27543-1-wenyou.yang@atmel.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170419_014632_811005_549ADF72 X-CRM114-Status: UNSURE ( 9.39 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Wenyou Yang , Oliver Hartkopp , linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, Quentin Schulz , Wenyou Yang , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add nodes to support the Controller Area Network(M_CAN) on SAMA5D2. The version of M_CAN IP core is 3.1.0 (CREL = 0x31040730). As said in SAMA5D2 datasheet, the CAN clock is recommended to use frequencies of 20, 40 or 80 MHz. To achieve these frequencies, PMC GCLK3 must select the UPLLCK(480 MHz) as source clock and divide by 24, 12, or 6. So, the "assigned-clock-rates" property has three options: 20000000, 40000000, and 80000000. The "assigned-clock-parents" property should be referred to utmi fixedly. The MSBs [bits 31:16] of the CAN Message RAM for CAN0 and CAN1 are default configured in 0x00200000. To avoid conflict with SRAM map for PM, change them to 0x00210000 in the AT91Bootstrap via setting the CAN Memories Address-based Register(SFR_CAN) of SFR. Signed-off-by: Wenyou Yang Tested-by: Quentin Schulz --- The patch is tested on SAMA5D2 Xplained and based on the patch set, 1. [PATCH v4 1/7] can: m_can: Disabled Interrupt Line 1 http://marc.info/?l=linux-can&m=149165343604033&w=2 Changes in v2: - Configures 10 TX Event FIFO elements and 10 TX Buffers/FIFO slots, because the TXE FIFO is needed to be configured. - Configure the offset of Message RAM for CAN1 followed from CAN0's. arch/arm/boot/dts/at91-sama5d2_xplained.dts | 24 +++++++++++++ arch/arm/boot/dts/sama5d2.dtsi | 56 +++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 9f7f8a7d8ff9..2f19b08dc226 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -257,6 +257,12 @@ status = "okay"; }; + can0: can@f8054000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; + status = "okay"; + }; + uart3: serial@fc008000 { atmel,use-dma-rx; atmel,use-dma-tx; @@ -321,6 +327,18 @@ bias-disable; }; + pinctrl_can0_default: can0_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can1_default: can1_default { + pinmux = , + ; + bias-disable; + }; + pinctrl_charger_chglev: charger_chglev { pinmux = ; bias-disable; @@ -468,6 +486,12 @@ }; }; + + can1: can@fc050000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; + }; }; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 22332be72140..383ca9307edf 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -762,6 +762,18 @@ atmel,clk-output-range = <0 83000000>; }; + can0_clk: can0_clk { + #clock-cells = <0>; + reg = <56>; + atmel,clk-output-range = <0 83000000>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + reg = <57>; + atmel,clk-output-range = <0 83000000>; + }; + classd_clk: classd_clk { #clock-cells = <0>; reg = <59>; @@ -890,6 +902,18 @@ #clock-cells = <0>; reg = <55>; }; + + can0_gclk: can0_gclk { + #clock-cells = <0>; + reg = <56>; + atmel,clk-output-range = <0 80000000>; + }; + + can1_gclk: can1_gclk { + #clock-cells = <0>; + reg = <57>; + atmel,clk-output-range = <0 80000000>; + }; }; }; @@ -1144,6 +1168,22 @@ clocks = <&clk32k>; }; + can0: can@f8054000 { + compatible = "bosch,m_can"; + reg = <0xf8054000 0x4000>, <0x210000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>, + <64 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-names = "int0", "int1"; + clocks = <&can0_clk>, <&can0_gclk>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&can0_gclk>; + assigned-clock-parents = <&utmi>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x0 0 0 32 0 0 10 10>; + status = "disabled"; + }; + spi1: spi@fc000000 { compatible = "atmel,at91rm9200-spi"; reg = <0xfc000000 0x100>; @@ -1305,6 +1345,22 @@ status = "okay"; }; + can1: can@fc050000 { + compatible = "bosch,m_can"; + reg = <0xfc050000 0x4000>, <0x210000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>, + <65 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-names = "int0", "int1"; + clocks = <&can1_clk>, <&can1_gclk>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&can1_gclk>; + assigned-clock-parents = <&utmi>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x1100 0 0 32 0 0 10 10>; + status = "disabled"; + }; + chipid@fc069000 { compatible = "atmel,sama5d2-chipid"; reg = <0xfc069000 0x8>;