From patchwork Thu May 18 10:52:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 9733301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A4012601C8 for ; Thu, 18 May 2017 10:52:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9035C28624 for ; Thu, 18 May 2017 10:52:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8510F28644; Thu, 18 May 2017 10:52:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3010B28624 for ; Thu, 18 May 2017 10:52:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Subject:To:From :Date:Reply-To:Cc:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=11jtAuqdSY1h2tP/CbteZIhZHWTgW6kdiSr4WjfylQ0=; b=VWgT2Cbt5c3BPP m4YDiO3B8dUYMH+Fbz8kkDeyJzLcVxzYf03HmzFgdTOq8ws+Mi0UZMqZckjd+4Vep5ronw7ApCEk4 nqnHP8JZh0Ip11i/3bcrgnDBB2iXW9Cdah0tplTf5VhL1+unqMFO+5FuI6kg1wtwLkMZvuSRnCejk WrjTDOL200sxiF2G0538QDbaZSm8WcAOn8Jd2m6OzgDEjB4jacFK3YwiXOq3dCc/4MnYOXaXNN4Br x4uV9PWVdsCSlHaKq0ThcBABb+OKNU1na/keF+7HicqxjaHwFcST38jpZdzNrhmxtRsOEG9hb1PTr bUovCEv7vz40E8Sxsdqg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dBJ2x-0003PK-AK; Thu, 18 May 2017 10:52:43 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:1be6]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dBJ2t-0002v4-AH for linux-arm-kernel@lists.infradead.org; Thu, 18 May 2017 10:52:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2014; h=Sender:Content-Type:MIME-Version:Message-ID:Subject:To:From:Date; bh=X5IDlD1if9cweK5TGBR4H1PbnKx1EbUFjJgbHrZpVPc=; b=CGTuQyh+GpZ7+QEGC7PYwhQ1+D1WTC/oF7xxNX0mcMET/9gnvfJnty32IH9llOFirI5rSZV9IaLIZo/7SsFatkWSPLJGUAMV+UVbawhsBgpJz3G23YvesFkw0Xuk1PV7TpE4N/0it+/E/OAnbrnlthcgWjVYM1IaJwuSUTjv79w=; Received: from n2100.armlinux.org.uk ([2001:4d48:ad52:3201:214:fdff:fe10:4f86]:55574) by pandora.armlinux.org.uk with esmtpsa (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.82_1-5b7a7c0-XX) (envelope-from ) id 1dBJ2V-0004yj-Gh for linux-arm-kernel@lists.infradead.org; Thu, 18 May 2017 11:52:15 +0100 Received: from linux by n2100.armlinux.org.uk with local (Exim 4.76) (envelope-from ) id 1dBJ2R-0008WP-4f for linux-arm-kernel@lists.infradead.org; Thu, 18 May 2017 11:52:11 +0100 Date: Thu, 18 May 2017 11:52:10 +0100 From: Russell King - ARM Linux To: linux-arm-kernel@lists.infradead.org Subject: [CFT] Always enable SMP mode on MP capable CPUs Message-ID: <20170518105209.GN22219@n2100.armlinux.org.uk> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170518_035239_658741_56136299 X-CRM114-Status: GOOD ( 11.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP As a result of a recent bug report, it has been found that certain CPUs must always have SMP mode enabled in order for the caches to work. Remove the conditional on setting the SMP bit(s). Signed-off-by: Russell King Tested-by: Fabio Estevam Tested-by: Florian Fainelli --- This needs to be tested on: - Cortex A5MP - Cortex A9MP - Cortex R7MP - Cortex A7MP - Cortex A12MP - Cortex A15MP - Cortex A17MP - Brahma B15 and any other CPU that mis-identifies itself with a MP-capable CPUID signature that might match one of those CPUs. I'm aware of a Cortex A9 CPU out there that does mis-identify itself as SMP capable but isn't: @ Core indicates it is SMP. Check for Aegis SOC where a single @ Cortex-A9 CPU is present but SMP operations fault. This will also need testing. arch/arm/mm/proc-v7.S | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 01d64c0b2563..4d48a4cf563b 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -286,14 +286,10 @@ ENDPROC(cpu_pj4b_do_resume) stmia r12, {r1-r6, lr} @ v7_invalidate_l1 touches r0-r6 bl v7_invalidate_l1 ldmia r12, {r1-r6, lr} -#ifdef CONFIG_SMP + mrc p15, 0, r0, c1, c0, 1 orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode - ALT_SMP(mrc p15, 0, r0, c1, c0, 1) - ALT_UP(mov r0, r10) @ fake it for UP orr r10, r10, r0 @ Set required bits - teq r10, r0 @ Were they already set? - mcrne p15, 0, r10, c1, c0, 1 @ No, update register -#endif + mcr p15, 0, r10, c1, c0, 1 @ No, update register b __v7_setup_cont /*