From patchwork Wed Jun 7 21:27:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 9772887 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AF3B160350 for ; Wed, 7 Jun 2017 21:36:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC37827E63 for ; Wed, 7 Jun 2017 21:36:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AF48027F9A; Wed, 7 Jun 2017 21:36:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3F2A927E63 for ; Wed, 7 Jun 2017 21:36:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=P1HZ5HeUj6Xl8c+FKhkO1/vuhJq7K47gt8VF0xVxT1Y=; b=BugMHfDQBRtzFO vtn88qy1pDqjZm5gwX/+d8Q7+jeeHbol0C9I5d12V9B1Ja6vMDJBn95JT7t3/BmsDqdWm56jLScEJ 9f+vF+e2F0oIGOpFRYabCstpFeNJgSqPywaSMbBibjyJ0MqBIkM7dA01NBuu6rHngOdoTDEzXdscF JCE00CtfKCh4dwSTJwWOwwmt5VrovrcEtXQuP+WynftGXkDxxyCKS+trj1Ka9CvGXZBXaiahCQ6rW I51kqi/sCG1WSw3jHE6sAS+MzB5xp5HnyqgoyhPkqitEUj3hdUTDeQZSeLygVeqIWOHEJMhbYr0yW tLWghlRRY0I0vNIf9gcg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dIidA-0005Yd-KK; Wed, 07 Jun 2017 21:36:44 +0000 Received: from fllnx210.ext.ti.com ([198.47.19.17]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dIiUi-0008Iq-1z for linux-arm-kernel@lists.infradead.org; Wed, 07 Jun 2017 21:28:01 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v57LRY9V014177; Wed, 7 Jun 2017 16:27:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1496870854; bh=oGDtYc4VfVfF0bI9BdDjpYGT2PF95ch3t7wgBWW0JRE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=w/fQQbpAbDPPqPWfeF39rCK5aCG9EB2Q3rDKv1h1bOPhzVUWWtt3sYnglFW7+wEwx DhJm/4b4UBOxhp5X502PRoRX/BZZEnCw7jpYHphDagY/Gse2U/sNB+2RjeVsCqRl0Y MxnR7SQjqtRxOU2wYgrux7zPW2fOI824OYRu7zrs= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v57LRY30010080; Wed, 7 Jun 2017 16:27:34 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Wed, 7 Jun 2017 16:27:33 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v57LRXxS014170; Wed, 7 Jun 2017 16:27:33 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.167]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v57LRX307122; Wed, 7 Jun 2017 16:27:33 -0500 (CDT) From: Suman Anna To: Tony Lindgren Subject: [PATCH 6/6] ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks Date: Wed, 7 Jun 2017 16:27:30 -0500 Message-ID: <20170607212730.33002-7-s-anna@ti.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170607212730.33002-1-s-anna@ti.com> References: <20170607212730.33002-1-s-anna@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170607_142800_194317_3687B2CA X-CRM114-Status: GOOD ( 10.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Lokesh Vutla , Tero Kristo , Subhajit Paul , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Subhajit Paul The GPU has two functional clocks - GPU_CORE_GCLK and GPU_HYD_GCLK. Both of these are mux clocks and are derived from the DPLL_CORE H14 output clock CORE_GPU_CLK by default. These clocks can also be be derived from DPLL_PER or DPLL_GPU. The GPU DPLL provides the output clocks primarily for the GPU. Configuring the GPU for different OPP clock frequencies is easier to achieve when using the DPLL_GPU rather than the other two DPLLs due to: 1. minimal affect on any other output clocks from these DPLLs 2. may require an impossible post-divider values on existing DPLLs without affecting other clocks. So, switch the GPU functional clocks to be sourced from GPU DPLL by default. This is done using the DT standard properties "assigned-clocks" and "assigned-clock-parents". Newer u-boots (from 2017.01 onwards) reuse and can update these properties to choose an appropriate one-time fixed OPP configuration as all the required ABB/AVS setup is performed within the bootloader. Note that there is no DVFS supported for any of the non-MPU domains. The DPLL will automatically transition into a low-power stop mode when the associated output clocks are not utilized or gated automatically. This patch also sets the initial values for the DPLL_GPU outputs. These values are chosen based on the OPP_NOM values defined as per recommendation from design team. The DPLL locked frequency is kept at 1277 MHz, so that the value for the divider clock, dpll_gpu_m2_ck, can be set to 425.67 MHz for OPP_NOM. Signed-off-by: Subhajit Paul [s-anna@ti.com: revise patch description] Signed-off-by: Suman Anna --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 76e2b7478141..cf229dfabf61 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -414,6 +414,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>; reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>; + assigned-clocks = <&dpll_gpu_ck>; + assigned-clock-rates = <1277000000>; }; dpll_gpu_m2_ck: dpll_gpu_m2_ck@2e8 { @@ -425,6 +427,8 @@ reg = <0x02e8>; ti,index-starts-at-one; ti,invert-autoidle-bit; + assigned-clocks = <&dpll_gpu_m2_ck>; + assigned-clock-rates = <425666667>; }; dpll_core_m2_ck: dpll_core_m2_ck@130 { @@ -1760,6 +1764,8 @@ clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>; ti,bit-shift = <24>; reg = <0x1220>; + assigned-clocks = <&gpu_core_gclk_mux>; + assigned-clock-parents = <&dpll_gpu_m2_ck>; }; gpu_hyd_gclk_mux: gpu_hyd_gclk_mux@1220 { @@ -1768,6 +1774,8 @@ clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>; ti,bit-shift = <26>; reg = <0x1220>; + assigned-clocks = <&gpu_hyd_gclk_mux>; + assigned-clock-parents = <&dpll_gpu_m2_ck>; }; l3instr_ts_gclk_div: l3instr_ts_gclk_div@e50 {