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Received: from metis.ext.4.pengutronix.de ([92.198.50.35]) by casper.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dJFMx-0001J8-OZ for linux-arm-kernel@lists.infradead.org; Fri, 09 Jun 2017 08:34:13 +0000 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1dJFKg-0001cY-H7; Fri, 09 Jun 2017 10:31:50 +0200 Received: from jlu by dude.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1dJFKe-00022B-Be; Fri, 09 Jun 2017 10:31:48 +0200 From: Jan Luebbe To: Chris Packham , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org Subject: [RFC PATCH 2/7] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Date: Fri, 9 Jun 2017 10:31:18 +0200 Message-Id: <20170609083123.6539-3-jlu@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170609083123.6539-1-jlu@pengutronix.de> References: <20170609083123.6539-1-jlu@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: jlu@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170609_093411_836130_17CF4F10 X-CRM114-Status: GOOD ( 13.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jan Luebbe , kernel@pengutronix.de MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The macro name is too generic, so add a AURORA_ prefix. Signed-off-by: Jan Luebbe --- arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +- arch/arm/mm/cache-l2x0.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/include/asm/hardware/cache-aurora-l2.h index c86124769831..dc5c479ec4c3 100644 --- a/arch/arm/include/asm/hardware/cache-aurora-l2.h +++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h @@ -41,7 +41,7 @@ #define AURORA_ACR_FORCE_WRITE_THRO_POLICY \ (2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) -#define MAX_RANGE_SIZE 1024 +#define AURORA_MAX_RANGE_SIZE 1024 #define AURORA_WAY_SIZE_SHIFT 2 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index a00d6f7fd34c..7d2d2a3c67d0 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1364,8 +1364,8 @@ static unsigned long aurora_range_end(unsigned long start, unsigned long end) * since cache range operations stall the CPU pipeline * until completion. */ - if (end > start + MAX_RANGE_SIZE) - end = start + MAX_RANGE_SIZE; + if (end > start + AURORA_MAX_RANGE_SIZE) + end = start + AURORA_MAX_RANGE_SIZE; /* * Cache range operations can't straddle a page boundary.