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Mon, 19 Jun 2017 15:52:55 +0000 From: Yury Norov To: Catalin Marinas , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH 13/20] arm64: ilp32: share aarch32 syscall handlers Date: Mon, 19 Jun 2017 18:49:56 +0300 Message-Id: <20170619155003.13218-14-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170619155003.13218-1-ynorov@caviumnetworks.com> References: <20170619155003.13218-1-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [85.253.137.34] X-ClientProxiedBy: VI1P190CA0008.EURP190.PROD.OUTLOOK.COM (10.165.188.149) To BY1PR0701MB1863.namprd07.prod.outlook.com (10.162.143.145) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: faf958d8-e5f7-4949-53cb-08d4b72b408d X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(201703131423075)(201703031133081); SRVR:BY1PR0701MB1863; X-Microsoft-Exchange-Diagnostics: 1; BY1PR0701MB1863; 3:7AEzKCVLgzFLi5WpmyvUQJq9O7mA9qWjX5Mc+7nMkESqYoEZe+j5AE1XiiZQT7JmXVWpj3/+/yUeeAfk8TBalB0RyHo41pvZs3+39WPtzosaywZH1CWmGYh1Bwdie/o2ImXmKv0xH7Cdkqctlj91uWp16KwiMTSqMOzKyW9W6MJvAlJpuwj55yXjiczw3/5MzbyMcF0KUjosm4KAgRjA3EbRZiP8fJ2KOdFLFfjNMeNOuMp5ZY+DVcpLk4t8LLfN5dqqOuHjhfSEeayCdahI/srZTuaAOwDkjrr8sQxZqtUS84eDvDQB+EOcayiSgyfpEtV4Xj1l+udyX4RNEpjZ2g==; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: szabolcs.nagy@arm.com, Heiko Carstens , Chris Metcalf , Yury Norov , philipp.tomsich@theobroma-systems.com, Joseph Myers , zhouchengming1@huawei.com, Steve Ellcey , Prasun.Kapoor@caviumnetworks.com, Andreas Schwab , Alexander Graf , Geert Uytterhoeven , Adam Borowski , manuel.montezelo@gmail.com, James Hogan , Chris Metcalf , Andrew Pinski , linyongting@huawei.com, Alexey Klimov , Mark Brown , Bamvor Zhangjian , Maxim Kuvyrkov , Florian Weimer , Nathan_Lynch@mentor.com, James Morse , Ramana Radhakrishnan , schwidefsky@de.ibm.com, davem@davemloft.net, christoph.muellner@theobroma-systems.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP According to userspace/kernel ABI, userspace off_t is passed in register pair just like in aarch32. In this patch corresponding aarch32 handlers are shared to ilp32 code. Signed-off-by: Yury Norov --- arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/entry32.S | 80 --------------------------- arch/arm64/kernel/entry32_common.S | 107 +++++++++++++++++++++++++++++++++++++ 3 files changed, 108 insertions(+), 80 deletions(-) create mode 100644 arch/arm64/kernel/entry32_common.S diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 41d9a3ab07a7..7243ffe358b4 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -30,6 +30,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \ sys_compat.o entry32.o binfmt_elf32.o arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o +arm64-obj-$(CONFIG_COMPAT) += entry32_common.o arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o arm64-obj-$(CONFIG_ARM64_MODULE_PLTS) += module-plts.o diff --git a/arch/arm64/kernel/entry32.S b/arch/arm64/kernel/entry32.S index f332d5d1f6b4..4bede0324440 100644 --- a/arch/arm64/kernel/entry32.S +++ b/arch/arm64/kernel/entry32.S @@ -39,83 +39,3 @@ ENTRY(compat_sys_rt_sigreturn_wrapper) mov x0, sp b compat_sys_rt_sigreturn ENDPROC(compat_sys_rt_sigreturn_wrapper) - -ENTRY(compat_sys_statfs64_wrapper) - mov w3, #84 - cmp w1, #88 - csel w1, w3, w1, eq - b compat_sys_statfs64 -ENDPROC(compat_sys_statfs64_wrapper) - -ENTRY(compat_sys_fstatfs64_wrapper) - mov w3, #84 - cmp w1, #88 - csel w1, w3, w1, eq - b compat_sys_fstatfs64 -ENDPROC(compat_sys_fstatfs64_wrapper) - -/* - * Note: off_4k (w5) is always in units of 4K. If we can't do the - * requested offset because it is not page-aligned, we return -EINVAL. - */ -ENTRY(compat_sys_mmap2_wrapper) -#if PAGE_SHIFT > 12 - tst w5, #~PAGE_MASK >> 12 - b.ne 1f - lsr w5, w5, #PAGE_SHIFT - 12 -#endif - b sys_mmap_pgoff -1: mov x0, #-EINVAL - ret -ENDPROC(compat_sys_mmap2_wrapper) - -/* - * Wrappers for AArch32 syscalls that either take 64-bit parameters - * in registers or that take 32-bit parameters which require sign - * extension. - */ -ENTRY(compat_sys_pread64_wrapper) - regs_to_64 x3, x4, x5 - b sys_pread64 -ENDPROC(compat_sys_pread64_wrapper) - -ENTRY(compat_sys_pwrite64_wrapper) - regs_to_64 x3, x4, x5 - b sys_pwrite64 -ENDPROC(compat_sys_pwrite64_wrapper) - -ENTRY(compat_sys_truncate64_wrapper) - regs_to_64 x1, x2, x3 - b sys_truncate -ENDPROC(compat_sys_truncate64_wrapper) - -ENTRY(compat_sys_ftruncate64_wrapper) - regs_to_64 x1, x2, x3 - b sys_ftruncate -ENDPROC(compat_sys_ftruncate64_wrapper) - -ENTRY(compat_sys_readahead_wrapper) - regs_to_64 x1, x2, x3 - mov w2, w4 - b sys_readahead -ENDPROC(compat_sys_readahead_wrapper) - -ENTRY(compat_sys_fadvise64_64_wrapper) - mov w6, w1 - regs_to_64 x1, x2, x3 - regs_to_64 x2, x4, x5 - mov w3, w6 - b sys_fadvise64_64 -ENDPROC(compat_sys_fadvise64_64_wrapper) - -ENTRY(compat_sys_sync_file_range2_wrapper) - regs_to_64 x2, x2, x3 - regs_to_64 x3, x4, x5 - b sys_sync_file_range2 -ENDPROC(compat_sys_sync_file_range2_wrapper) - -ENTRY(compat_sys_fallocate_wrapper) - regs_to_64 x2, x2, x3 - regs_to_64 x3, x4, x5 - b sys_fallocate -ENDPROC(compat_sys_fallocate_wrapper) diff --git a/arch/arm64/kernel/entry32_common.S b/arch/arm64/kernel/entry32_common.S new file mode 100644 index 000000000000..f4a5e4de6201 --- /dev/null +++ b/arch/arm64/kernel/entry32_common.S @@ -0,0 +1,107 @@ +/* + * Compat system call wrappers + * + * Copyright (C) 2012 ARM Ltd. + * Authors: Will Deacon + * Catalin Marinas + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include + +#include +#include +#include +#include + +/* + * Note: off_4k (w5) is always in units of 4K. If we can't do the + * requested offset because it is not page-aligned, we return -EINVAL. + */ +ENTRY(compat_sys_mmap2_wrapper) +#if PAGE_SHIFT > 12 + tst w5, #~PAGE_MASK >> 12 + b.ne 1f + lsr w5, w5, #PAGE_SHIFT - 12 +#endif + b sys_mmap_pgoff +1: mov x0, #-EINVAL + ret +ENDPROC(compat_sys_mmap2_wrapper) + +/* + * Wrappers for AArch32 syscalls that either take 64-bit parameters + * in registers or that take 32-bit parameters which require sign + * extension. + */ +ENTRY(compat_sys_pread64_wrapper) + regs_to_64 x3, x4, x5 + b sys_pread64 +ENDPROC(compat_sys_pread64_wrapper) + +ENTRY(compat_sys_pwrite64_wrapper) + regs_to_64 x3, x4, x5 + b sys_pwrite64 +ENDPROC(compat_sys_pwrite64_wrapper) + +ENTRY(compat_sys_truncate64_wrapper) + regs_to_64 x1, x2, x3 + b sys_truncate +ENDPROC(compat_sys_truncate64_wrapper) + +ENTRY(compat_sys_ftruncate64_wrapper) + regs_to_64 x1, x2, x3 + b sys_ftruncate +ENDPROC(compat_sys_ftruncate64_wrapper) + +ENTRY(compat_sys_readahead_wrapper) + regs_to_64 x1, x2, x3 + mov w2, w4 + b sys_readahead +ENDPROC(compat_sys_readahead_wrapper) + +ENTRY(compat_sys_fadvise64_64_wrapper) + mov w6, w1 + regs_to_64 x1, x2, x3 + regs_to_64 x2, x4, x5 + mov w3, w6 + b sys_fadvise64_64 +ENDPROC(compat_sys_fadvise64_64_wrapper) + +ENTRY(compat_sys_sync_file_range2_wrapper) + regs_to_64 x2, x2, x3 + regs_to_64 x3, x4, x5 + b sys_sync_file_range2 +ENDPROC(compat_sys_sync_file_range2_wrapper) + +ENTRY(compat_sys_fallocate_wrapper) + regs_to_64 x2, x2, x3 + regs_to_64 x3, x4, x5 + b sys_fallocate +ENDPROC(compat_sys_fallocate_wrapper) + +ENTRY(compat_sys_statfs64_wrapper) + mov w3, #84 + cmp w1, #88 + csel w1, w3, w1, eq + b compat_sys_statfs64 +ENDPROC(compat_sys_statfs64_wrapper) + +ENTRY(compat_sys_fstatfs64_wrapper) + mov w3, #84 + cmp w1, #88 + csel w1, w3, w1, eq + b compat_sys_fstatfs64 +ENDPROC(compat_sys_fstatfs64_wrapper)