From patchwork Fri Jun 23 14:58:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 9806755 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 46F1360349 for ; Fri, 23 Jun 2017 15:00:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36C9B287AD for ; Fri, 23 Jun 2017 15:00:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B27C287AF; Fri, 23 Jun 2017 15:00:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DC64B287AE for ; Fri, 23 Jun 2017 15:00:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vRUNPJMZZayVn3ql63IpxGZDNGXyoehGlisDPwHRqX8=; b=FtV3ocmZNteaca 6cUtEllngsHCHpK8zsMt4bJdFtl5pDYk90x0HF8NJvFqKgj1FIGGV0g3lGKTVrHJB9Dgu3/ml3dRY dT4z09fDoTxqT4xSpxuRrjxMh1RP2X80NoUZ0Yzxf9GPPDqMNLWrxXxdm5YtSSidPpHdCX6xuwgUw xXGOztqHHl1n22to8rAbXKoju7VW/WbczzyQahUn052s7WV9ZQTulTx5Wzr5mmFAdhNNCRw+kuHGr Gkv/+HyQVzGcqGz7opxb3DA3bRBjsNVaOe9pUq1dUc60LVDvcdefd9vnCqIMTzqAJZSZK2GHeZADY vC6IgzwkXjCfbpo2qyPA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dOQ4b-0007Jk-Md; Fri, 23 Jun 2017 15:00:37 +0000 Received: from szxga01-in.huawei.com ([45.249.212.187]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dOQ3g-0005bD-4p for linux-arm-kernel@lists.infradead.org; Fri, 23 Jun 2017 14:59:42 +0000 Received: from 172.30.72.55 (EHLO DGGEML402-HUB.china.huawei.com) ([172.30.72.55]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AQV92878; Fri, 23 Jun 2017 22:59:08 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.203.177.212) by DGGEML402-HUB.china.huawei.com (10.3.17.38) with Microsoft SMTP Server id 14.3.301.0; Fri, 23 Jun 2017 22:59:00 +0800 From: shameer To: , , , , , Subject: [PATCH v3 2/2] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801 Date: Fri, 23 Jun 2017 15:58:01 +0100 Message-ID: <20170623145801.325244-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170623145801.325244-1-shameerali.kolothum.thodi@huawei.com> References: <20170623145801.325244-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.203.177.212] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.594D2CBD.0014, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: f9c2803f2005d7378305baa35f391a70 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170623_075940_598041_2DAC5ADA X-CRM114-Status: GOOD ( 12.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gabriele.paoloni@huawei.com, john.garry@huawei.com, linuxarm@huawei.com, shameer , linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, wangzhou1@hisilicon.com, guohanjun@huawei.com, linux-arm-kernel@lists.infradead.org, devel@acpica.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The HiSilicon erratum 161010801 describes the limitation of HiSilicon platforms Hip06/Hip07 to support the SMMU mappings for MSI transactions. On these platforms GICv3 ITS translator is presented with the deviceID by extending the MSI payload data to 64 bits to include the deviceID. Hence, the PCIe controller on this platforms has to differentiate the MSI payload against other DMA payload and has to modify the MSI payload. This basically makes it difficult for this platforms to have a SMMU translation for MSI. This patch implements a ACPI table based quirk to reserve the hw msi regions in the smmu-v3 driver which means these address regions will not be translated and will be excluded from iova allocations. Signed-off-by: shameer --- drivers/iommu/arm-smmu-v3.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index abe4b88..c9346f2 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -597,6 +597,7 @@ struct arm_smmu_device { u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) +#define ARM_SMMU_OPT_RESV_HW_MSI (1 << 1) u32 options; struct arm_smmu_cmdq cmdq; @@ -1904,14 +1905,34 @@ static void arm_smmu_get_resv_regions(struct device *dev, struct list_head *head) { struct iommu_resv_region *region; + struct arm_smmu_device *smmu; + struct iommu_fwspec *fwspec = dev->iommu_fwspec; int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; + int resv = 0; - region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH, - prot, IOMMU_RESV_SW_MSI); - if (!region) + smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); + if (WARN_ON(!smmu)) return; - list_add_tail(®ion->list, head); + if ((smmu->options & ARM_SMMU_OPT_RESV_HW_MSI)) { + + if (!is_of_node(smmu->dev->fwnode)) + resv = iort_iommu_its_get_resv_regions(dev, head); + + if (resv < 0) { + dev_warn(dev, "HW MSI region resv failed: %d\n", resv); + return; + } + } + + if (!resv) { + region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH, + prot, IOMMU_RESV_SW_MSI); + if (!region) + return; + + list_add_tail(®ion->list, head); + } iommu_dma_get_resv_regions(dev, head); } @@ -2611,6 +2632,7 @@ static void parse_driver_acpi_options(struct acpi_iort_smmu_v3 *iort_smmu, switch (iort_smmu->model) { case ACPI_IORT_SMMU_HISILICON_HI161X: smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH; + smmu->options |= ARM_SMMU_OPT_RESV_HW_MSI; break; default: break;