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bh=ucwO0/dfSzGCKCP+TnZNztoJaAp2adoM6OoJmVQzhpc=; b=RNN3mlAuP7Fa/zsVvyuNDphzfKLiwD1GidaJu6VBOPBDN/vEohaRkuIEOhOpg2ugdX a7zoGl0QYvYW5x4V/udwxEhfRftbfUfT8tn+anmusNXL5uGMLQa5YghhC4K3suzW8JJY RrIxJ+pk9Tf3czv6bUDHixLV+HeE/DkwSqt45kmSNcOQnJwuQwSQAUMNvM1SthNzRch0 Lb+vp/K2SajYBApLWhOr87q/xr/zosvlYyTUtIRHkheFXCHwkiREi30VxYArpD2ZnxYN RZDRseD10m5l9HEpb7Jpmr1WOWAH7BBiLtyKUCVOhtQ0pza+7Ld4eBcYeCOfU5cZrrlW btBw== X-Gm-Message-State: AKS2vOz3Zu/85cMKq83GJ40RSR2QSNwgH9Nb5Xv0kWk/U1xrbwcnF//0 2iG9SQdf4mFa+w== X-Received: by 10.80.176.198 with SMTP id j64mr107032edd.168.1498482995122; Mon, 26 Jun 2017 06:16:35 -0700 (PDT) Received: from localhost.localdomain ([91.177.84.115]) by smtp.gmail.com with ESMTPSA id e54sm69436eda.27.2017.06.26.06.16.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Jun 2017 06:16:34 -0700 (PDT) From: Luc Van Oostenryck To: Lorenzo Pieralisi Subject: [PATCH] arm64: use readq() instead of readl() to read 64bit entry_point Date: Mon, 26 Jun 2017 15:16:25 +0200 Message-Id: <20170626131625.79059-1-luc.vanoostenryck@gmail.com> X-Mailer: git-send-email 2.13.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170626_061657_752055_BAF991F0 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Laura Abbott , Luc Van Oostenryck MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Here the entrypoint, declared as a 64 bit integer, is read from a pointer to 64bit integer but the read is done via readl_relaxed() which is for 32bit quantities. All the high bits will thus be lost which change the meaning of the test against zero done later. Fix this by using readq_relaxed() instead as it should be for 64bit quantities. Signed-off-by: Luc Van Oostenryck Acked-by: Mark Rutland Acked-by: Lorenzo Pieralisi Tested-by: Khuong Dinh Tested-by: Khuong Dinh --- !!! Warning !!! I don't have the HW to test this, nor have I read the ACPI specs. This is only compile tested. --- arch/arm64/kernel/acpi_parking_protocol.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/acpi_parking_protocol.c b/arch/arm64/kernel/acpi_parking_protocol.c index 1f5655cd9..f35e80aad 100644 --- a/arch/arm64/kernel/acpi_parking_protocol.c +++ b/arch/arm64/kernel/acpi_parking_protocol.c @@ -125,7 +125,7 @@ static void acpi_parking_protocol_cpu_postboot(void) struct parking_protocol_mailbox __iomem *mailbox = cpu_entry->mailbox; __le64 entry_point; - entry_point = readl_relaxed(&mailbox->entry_point); + entry_point = readq_relaxed(&mailbox->entry_point); /* * Check if firmware has cleared the entry_point as expected * by the protocol specification.